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* Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori2012-11-0152-334/+501
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * afaerber/qom-cpu: (35 commits) target-i386: Pass X86CPU to kvm_handle_halt() target-i386: Pass X86CPU to kvm_get_mp_state() cpu: Move thread_id to CPUState cpus: Pass CPUState to run_on_cpu() target-i386: Pass X86CPU to cpu_x86_inject_mce() target-i386: Pass X86CPU to kvm_mce_inject() cpus: Pass CPUState to [qemu_]cpu_has_work() spapr: Pass PowerPCCPU to hypercalls spapr: Pass PowerPCCPU to spapr_hypercall() target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall target-ppc: Pass PowerPCCPU to powerpc_excp() xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb() cpus: Pass CPUState to qemu_wait_io_event_common() cpus: Pass CPUState to flush_queued_work() cpu: Move queued_work_{first,last} to CPUState cpus: Pass CPUState to qemu_cpu_kick() target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq() cpus: Pass CPUState to qemu_tcg_init_vcpu() cpus: Pass CPUState to qemu_tcg_cpu_thread_fn ... Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * target-i386: Pass X86CPU to kvm_handle_halt()Andreas Färber2012-10-311-2/+5
| | | | | | | | | | | | Needed for moving interrupt_request and halted fields to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-i386: Pass X86CPU to kvm_get_mp_state()Andreas Färber2012-10-311-4/+5
| | | | | | | | | | | | Needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move thread_id to CPUStateAndreas Färber2012-10-314-7/+11
| | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to run_on_cpu()Andreas Färber2012-10-318-11/+24
| | | | | | | | | | | | | | | | CPUArchState is no longer needed. Move the declaration to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-i386: Pass X86CPU to cpu_x86_inject_mce()Andreas Färber2012-10-314-5/+8
| | | | | | | | | | | | Needed for changing run_on_cpu() argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-i386: Pass X86CPU to kvm_mce_inject()Andreas Färber2012-10-311-3/+5
| | | | | | | | | | | | | | Needed for changing cpu_x86_inject_mce() argument to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Rebased onto hwaddr]
| * cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-3123-31/+66
| | | | | | | | | | | | | | | | | | | | For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
| * spapr: Pass PowerPCCPU to hypercallsAndreas Färber2012-10-317-35/+42
| | | | | | | | | | | | | | Needed for changing cpu_has_work() argument type to CPUState, used in h_cede(). Signed-off-by: Andreas Färber <afaerber@suse.de>
| * spapr: Pass PowerPCCPU to spapr_hypercall()Andreas Färber2012-10-314-4/+7
| | | | | | | | | | | | Needed for changing the hypercall handlers' argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-ppc: Pass PowerPCCPU to cpu_ppc_hypercallAndreas Färber2012-10-313-4/+6
| | | | | | | | | | | | | | | | Adapt emulate_spapr_hypercall() accordingly. Needed for changing spapr_hypercall() argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-ppc: Pass PowerPCCPU to powerpc_excp()Andreas Färber2012-10-311-16/+20
| | | | | | | | | | | | Needed for changing cpu_ppc_hypercall() argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()Andreas Färber2012-10-311-2/+5
| | | | | | | | | | | | | | Needed for changing cpu_has_work() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Max Filippov <jcmvbkbc@gmail.com>
| * cpus: Pass CPUState to qemu_wait_io_event_common()Andreas Färber2012-10-311-7/+5
| | | | | | | | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to flush_queued_work()Andreas Färber2012-10-311-3/+2
| | | | | | | | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move queued_work_{first,last} to CPUStateAndreas Färber2012-10-313-10/+11
| | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to qemu_cpu_kick()Andreas Färber2012-10-3112-20/+26
| | | | | | | | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPUAndreas Färber2012-10-311-2/+6
| | | | | | | | | | | | Needed for changing qemu_cpu_kick() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()Andreas Färber2012-10-311-20/+35
| | | | | | | | | | | | | | Needed for changing qemu_cpu_kick() argument type to CPUState and for moving halted field into CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to qemu_tcg_init_vcpu()Andreas Färber2012-10-311-5/+2
| | | | | | | | | | | | CPUArchState is no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to qemu_tcg_cpu_thread_fnAndreas Färber2012-10-311-3/+3
| | | | | | | | | | | | | | | | | | | | CPUArchState is no longer needed except for iterating the CPUs. Needed for qemu_tcg_init_vcpu(). KVM and dummy threads still need CPUArchState for cpu_single_env. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move halt_cond to CPUStateAndreas Färber2012-10-313-11/+13
| | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to cpu_can_run()Andreas Färber2012-10-311-8/+6
| | | | | | | | | | | | | | | | CPUArchState is no longer needed there. Also change its return type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to cpu_is_stopped()Andreas Färber2012-10-314-6/+14
| | | | | | | | | | | | | | | | CPUArchState is no longer needed there. Also change the return type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move stopped field to CPUStateAndreas Färber2012-10-314-14/+22
| | | | | | | | | | | | Change its type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ppce500_spin: Store PowerPCCPU in SpinKickAndreas Färber2012-10-311-3/+3
| | | | | | | | | | | | Needed for moving stopped field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move stop field to CPUStateAndreas Färber2012-10-313-10/+20
| | | | | | | | | | | | Change its type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Move created field to CPUStateAndreas Färber2012-10-313-7/+9
| | | | | | | | | | | | Change its type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpus: Pass CPUState to qemu_cpu_kick_thread()Andreas Färber2012-10-311-5/+4
| | | | | | | | | | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * cpus: Pass CPUState to qemu_cpu_is_self()Andreas Färber2012-10-317-14/+28
| | | | | | | | | | | | | | | | | | Change return type to bool, move to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com> [AF: Updated new caller qemu_in_vcpu_thread()]
| * target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()Andreas Färber2012-10-302-2/+4
| | | | | | | | | | | | | | | | Simplifies the call in apic_sipi() again and needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * apic: Store X86CPU in APICCommonStateAndreas Färber2012-10-305-25/+30
| | | | | | | | | | | | | | | | | | | | | | Prepares for using a link<> property to connect APIC with CPU and for changing the CPU APIs to CPUState. Resolve Coding Style warnings by moving the closing parenthesis of foreach_apic() macro to next line. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * target-i386: Inline APIC cpu_env property settingAndreas Färber2012-10-302-2/+4
| | | | | | | | | | | | | | This prepares for changing the variable type from void*. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * target-i386: Initialize APIC at CPU levelIgor Mammedov2012-10-302-51/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | (L)APIC is a part of cpu [1] so move APIC initialization inside of x86_cpu object. Since cpu_model and override flags currently specify whether APIC should be created or not, APIC creation&initialization is moved into x86_cpu_apic_init() which is called from x86_cpu_realize(). [1] - all x86 cpus have integrated APIC if we overlook existence of i486, and it's more convenient to model after majority of them. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-i386: If x86_cpu_realize() failed, report error and do cleanupIgor Mammedov2012-10-301-2/+7
| | | | | | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * target-i386: cpu_x86_register(): report error from property setterIgor Mammedov2012-10-301-1/+2
| | | | | | | | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | arm_boot: Change initrd load address to "halfway through RAM"Peter Maydell2012-11-012-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid continually having to bump the initrd load address to account for larger kernel images, put the initrd halfway through RAM. This allows large kernels on new boards with lots of RAM to work OK, without breaking existing usecases for boards with only 32MB of RAM. Note that this change fixes in passing a bug where we were passing an overly large max_size to load_image_targphys() for the initrd, which meant that we wouldn't correctly refuse to load an enormous initrd that didn't actually fit into RAM. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Tested-by: Cole Robinson <crobinso@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* | Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafAurelien Jarno2012-11-016-26/+79
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | * 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: pseries: Cleanup duplications of ics_valid_irq() code pseries: Clean up inconsistent variable name in xics.c target-ppc: Extend FPU state for newer POWER CPUs target-ppc: Rework storage of VPA registration state Revert "PPC: pseries: Remove hack for PIO window"
| * | pseries: Cleanup duplications of ics_valid_irq() codeDavid Gibson2012-11-011-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | A couple of places in xics.c open-coded the same logic as is already implemented in ics_valid_irq(). This patch fixes the code duplication. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | pseries: Clean up inconsistent variable name in xics.cDavid Gibson2012-11-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Throughout xics.c 'nr' is used to refer to a global interrupt number, and 'server' is used to refer to an interrupt server number (i.e. CPU number). Except in icp_set_mfrr(), where 'nr' is used as a server number. Fix this confusing inconsistency. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | target-ppc: Extend FPU state for newer POWER CPUsDavid Gibson2012-11-013-14/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some extra FPU state to CPUPPCState. Specifically, fpscr is extended to a target_ulong bits, since some recent (64 bit) CPUs now have more status bits than fit inside 32 bits. Also, we add the 32 VSR registers present on CPUs with VSX (these extend the standard FP regs, which together with the Altivec/VMX registers form a 64 x 128bit register file for VSX). We don't actually support the instructions using these extra registers in TCG yet, but we still need a place to store the state so we can sync it with KVM and savevm/loadvm it. This patch updates the savevm code to not fail on the extended state, but also does not actually save it - that's a project for another patch. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | target-ppc: Rework storage of VPA registration stateDavid Gibson2012-11-011-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We change the storage of the VPA information to explicitly use fixed size integer types which will make life easier for syncing this data with KVM, which we will need in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: fix commit message] Signed-off-by: Alexander Graf <agraf@suse.de>
| * | Revert "PPC: pseries: Remove hack for PIO window"David Gibson2012-11-012-2/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit a178274efabcbbc5d44805b51def874e47051325. Contrary to that commit's message, the users of old_portio are not all gone. In particular VGA still uses it via portio_list_add(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* | | Merge branch 'arm-devs.for-upstream' of ↵Aurelien Jarno2012-11-0126-429/+541
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) hw/sd.c: add SD card save/load support vmstate: Add support for saving/loading bitmaps hw/sd.c: Fix erase for high capacity cards pflash_cfi01: Fix debug mode printfery pflash_cfi0x: QOMified pflash_cfi01: remove unused total_len field pflash_cfi0x: remove unused base field hw/versatile_i2c: Use LOG_GUEST_ERROR hw/arm_l2x0: Use LOG_GUEST_ERROR hw/arm_sysctl: Use LOG_GUEST_ERROR hw/armv7m_nvic: Use LOG_GUEST_ERROR and LOG_UNIMP hw/arm_timer: Use LOG_GUEST_ERROR and LOG_UNIMP hw/arm_gic: Use LOG_GUEST_ERROR hw/arm11mpcore: Use LOG_GUEST_ERROR rather than hw_error() hw/pl190: Use LOG_UNIMP rather than hw_error() hw/pl110: Use LOG_GUEST_ERROR rather than hw_error() hw/pl080: Use LOG_GUEST_ERROR and LOG_UNIMP hw/pl061: Use LOG_GUEST_ERROR hw/pl050: Use LOG_GUEST_ERROR hw/exynos4_boards: Don't prematurely explode QEMUMachineInitArgs ...
| * | hw/sd.c: add SD card save/load supportIgor Mitsyanko2012-10-301-25/+64
| | | | | | | | | | | | | | | | | | | | | | | | This patch updates SD card model to support save/load of card's state. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | vmstate: Add support for saving/loading bitmapsPeter Maydell2012-10-302-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | Add support for saving/loading bitmap.h bitmaps in vmstate. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Juan Quintela <quintela@redhat.com>
| * | hw/sd.c: Fix erase for high capacity cardsIgor Mitsyanko2012-10-302-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Standard capacity cards SDSC use byte unit address while SDHC and SDXC cards use block unit address (512 bytes) when setting ERASE_START and ERASE_END with CMD32 and CMD33, we have to account for this. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | pflash_cfi01: Fix debug mode printferyPeter Crosthwaite2012-10-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | This DPRINTF was throwing a warning due to a missing cast. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | pflash_cfi0x: QOMifiedPeter Crosthwaite2012-10-302-87/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QOMified the pflash_cfi0x so machine models can connect them up in custom ways. Kept the pflash_cfi0x_register functions as is. They can still be used to create a flash straight onto system memory. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | pflash_cfi01: remove unused total_len fieldPeter Crosthwaite2012-10-301-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This field is completely unused. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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