| Commit message (Collapse) | Author | Age | Files | Lines |
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* kraxel/acpi.1:
acpi: drop debug port
q35: update lpc pci config space according to configured devices
apci: switch piix4 pci hotplug to memory api
acpi: remove acpi_gpe_blk
apci: switch piix4 gpe to memory api
acpi: fix piix4 smbus mapping
acpi: switch smbus to memory api
acpi: cleanup ich9 memory region
apci: switch ich9 smi to memory api
apci: switch ich9 gpe to memory api
acpi: cleanup vt82c686 memory region
acpi: cleanup piix4 memory region
apci: switch evt to memory api
apci: switch cnt to memory api
apci: switch timer to memory api
apci: switch vt82c686 to memory api
apci: switch ich9 to memory api
apci: switch piix4 to memory api
Conflicts:
hw/lpc_ich9.c
Resolved merge conflict due to apm_init adding an argument.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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I'm pretty sure this isn't needed any more. I think this predates the
switch to seabios, and the seabios DSDT table has a DBUG() aml macro
which writes stuff to the seabios debug port (0x402).
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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With gpe being switched to memory api this is no longer needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Make write to the smbus base register and enable bit actually work.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Nothing left to do, everything handled by subregions,
we can zap the reaw/write handlers now.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Nothing left to do, everything handled by subregions,
we can zap the reaw/write handlers now.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Nothing left to do, everything handled by subregions,
we can zap the reaw/write handlers now.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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* aneesh/for-upstream:
virtfs-proxy-helper: use setresuid and setresgid
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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The setfsuid and setfsgid system calls are obscure and they complicate
the error checking (that glibc's warn_unused_result "feature" forces
us to do). Switch to the standard setresuid and setresgid functions.
Signed-off-by: Paolo Bonzini <pbonini@redhat.com
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
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* kraxel/usb.74:
usb-tablet: Allow connecting to ehci
ehci: Lower timer freq when the periodic schedule is idle
usb: Allow overriding of usb_desc at the device level
usb: Don't allow USB_RET_ASYNC for interrupt packets
usb: Call wakeup when data becomes available for all devices with int eps
add pc-1.4
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Our ehci code has is capable of significantly lowering the wakeup rate
for the hcd emulation while the device is idle. It is possible to add
similar code ot the uhci emulation, but that simply is not there atm,
and there is no reason why a (virtual) usb-tablet can not be a USB-2 device.
Making usb-hid devices connect to the emulated ehci controller instead
of the emulated uhci controller on vms which have both lowers the cpuload
for a fully idle vm from 20% to 2-3% (on my laptop).
An alternative implementation to using a property to select the tablet
type, would be simply making it a new device type, ie usb-tablet2, but the
downside of that is that this will require libvirt changes to be available
through libvirt at all, and then management tools changes to become the
default for new vms, where as using a property will automatically get
any pc-1.3 type vms the lower cpuload.
[ kraxel: adapt compat property for post-1.3 merge ]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
tablet compat fixup
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Lower the timer freq if no iso schedule packets complete for 64 frames in
a row.
We can safely do this, without adding latency, because:
1) If there is isoc traffic this will never trigger
2) For async handled interrupt packets (only usb-host), the completion handler
will immediately schedule the frame_timer from a bh
3) All devices using NAK to signal no data for interrupt endpoints now use
wakeup, which will immediately schedule the frame_timer from a bh
The advantage of this is that when we only have interrupt packets in the
periodic schedule, async_stepdown can do its work and significantly lower
the frequency at which the frame_timer runs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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This allows devices to present a different set of descriptors based on
device properties.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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It is tempting to use USB_RET_ASYNC for interrupt packets, rather then the
current NAK + polling approach, but this causes issues for migration, as
an async completed packet will not getting written back to guest memory until
the next poll time, and if a migration happens in between it will get lost!
Make an exception for host devices, because:
1) host-linux actually uses async completion for interrupt endpoints
2) host devices don't migrate anyways
Ideally we would convert host-linux.c to handle (input) interrupt endpoints in
a buffered manner like it does for isoc endpoints, keeping multiple urbs
submitted to ensure the devices timing requirements are met, as well as making
its interrupt ep handling the same as other usb-devices.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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This is necessary for proper interaction with the xhci controller, and it
will allow other hcds to lower there frame timer while waiting for interrupt
data.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Default to 'cc' as our compiler, rather than 'gcc'. We used to have
to insist on gcc when we still kept the CPU env in a fixed global
register, but this is no longer necessary and we will now compile OK
on clang as well as gcc. Using 'cc' should generally result in us
using the most standard and maintained system compiler for the
platform. (For instance on newer MacOS X 'gcc' exists but is an
elderly compiler provided mostly for legacy reasons, and 'cc'
(which is clang) is definitely the better choice.) On Linux there
will generally be no user-visible change since cc will be gcc.
This changeover necessitates a slight reworking of how we set the
'cc' variable, because GNU cross toolchains generally provide a
'${cross_prefix}gcc' but not a '${cross_prefix}cc'.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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The Linux syscalls underlying pread() and pwrite() take a 64 bit
offset on all architectures, even if some of them name the syscall
"pread/pwrite" rather than "pread64/pwrite64" for historical reasons.
So move the four QEMU target architectures (arm, i386, sparc,
unicore32) which were defining TARGET_NR_pread/pwrite to define
TARGET_NR_pread64/pwrite64 instead, and drop the TARGET_NR_pread/pwrite
implementation code completely.
(Based on examination of the kernel sources for the four architectures
this patch affects.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Use movcond for all sorts of conditional moves, ABS, CLAMPS, MIN/MAX
opcodes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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The Miscellaneous Special Registers Option provides zero to four scratch
registers within the processor readable and writable by RSR, WSR, and
XSR. These registers are privileged. They may be useful for some
application-specific exception and interrupt processing tasks in the
kernel. The MISC registers are undefined after reset.
See ISA, 4.7.3 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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There are read-only (DEBUGCAUSE, PRID) and write-only (INTCLEAR) SRs,
and INTERRUPT/INTSET SR allows rsr/wsr, but not xsr. Raise illeagal
opcode exception on illegal access to these SRs.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr,
xsr) are associated with their corresponding SR and raise illegal opcode
exception in case the register is not configured for the core.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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In XEA1, the Options for Memory Protection and Translation and the
corresponding TLB management instructions are not available. Instead,
functionality similar to the Region Protection Option is available
through the cache attribute register. See ISA, A.2.14 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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ATOMCTL SR controls s32c1i opcode behavior depending on targeted memory
type. See ISA, 4.3.12.4 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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* 'master' of git.qemu-project.org:/pub/git/qemu:
target-mips: Fix incorrect shift for SHILO and SHILOV
target-mips: Fix incorrect code and test for INSV
xilinx_uartlite: Accept input after rx FIFO pop
xilinx_uartlite: suppress "cannot receive message"
xilinx_axienet: Implement R_IS behaviour
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helper_shilo has not been shifting an accumulator value correctly for negative
values in 'shift' field. Minor optimization for shift=0 case.
This change also adds tests that will trigger issue and check for regressions.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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The device return false from the can receive function when the FIFO is
full. This mean the device should check for buffered input whenever a byte is
popped from the FIFO.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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This message is not an error condition, its just informing the user that
the device is corking the uart traffic to not drop characters.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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The interrupt status register R_IS is the standard clear-on-write behaviour.
This was unimplemented and defaulting to updating the register to the written
value. Implemented clear-on-write.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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The external CPU models were removed on QEMU 1.2, and the support for
the "cpudef" config sections was documented as deprecated, but the
actual removal of the config section was pending.
Now that QEMU 1.3 was released, we can finally kill the support for
cpudef config sections, and support only the built-in CPU models from
target-i386/cpu.c.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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* 'memory-ioport' of git://github.com/afaerber/qemu-cpu:
hw/dma.c: Replace register_ioport_*
hw/pc.c: Replace register_ioport_*
serial: Replace register_ioport_*
hw/cirrus_vga.c: Replace register_ioport_*
hw/apm.c: Replace register_ioport_*
isa: Add isa_address_space_io()
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Replace all register_ioport_*() with the new Memory API functions.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Replace all register_ioport_*() with portio_*() or a MemoryRegion.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Replace all register_ioport_*() with a MemoryRegion.
This permits to use the new Memory stuff like listeners.
For more flexibility, the IO address space is passed as an argument.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto serial split]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Replace all register_ioport_*() with the new Memory API.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
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