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* char: rename qemu_chr_write() -> qemu_chr_fe_write()Anthony Liguori2011-08-2228-34/+34
| | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* tcg/ppc64: fix 16/32 mixupmalc2011-08-221-2/+2
| | | | Signed-off-by: malc <av1474@comtv.ru>
* Merge branch 'master' of git://git.qemu.org/qemumalc2011-08-2229-283/+594
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| * Merge remote-tracking branch 'pmaydell/armhw-for-upstream' into stagingAnthony Liguori2011-08-219-136/+415
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| | * hw/stellaris: Add support for RCC2 registerEngin AYDOGAN2011-08-171-4/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the RCC2 register on Fury class devices. Based on a patch by Vijay Kumar. Signed-off-by: Engin AYDOGAN <engin@bzzzt.biz> [Peter Maydell: fixed comment typos, minor cleanup of unreachable code] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| | * hw/pl061.c: Support GPIOAMSEL registerPeter Maydell2011-08-171-1/+8
| | | | | | | | | | | | | | | | | | Support the GPIOAMSEL register found on some Stellaris boards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| | * hw/pl061: Convert to VMStatePeter Maydell2011-08-171-95/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the PL061 to VMState. We choose to widen the struct members to uint32_t rather than the other two options of breaking migration compatibility or using vmstate hacks to read/write a 32 bit value into an 8 bit struct field. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| | * vexpress, realview: Use pl111, not pl110Peter Maydell2011-08-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The Versatile Express, Realview EB, PBX A9 and PB A8 boards all use a PL111 for their graphics, not a PL110. Now we model the PL111, use it on these board models. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| | * versatilepb: Implement SYS_CLCD mux control register bitsPeter Maydell2011-08-173-11/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Versatile PB, PL110 graphics adaptor only natively supports 5551 pixel format; an external mux swaps bits around to allow RGB565 and BGR565, under the control of bits [1:0] in the SYS_CLCD system register. Implement these SYS_CLCD register bits, and use a gpio line to feed them out of the system register model, across the versatilepb board and into the pl110 so we can select the right format. This is necessary as recent Linux versatile kernels default to programming the CLCD and mux for 16 bit BGR rather than 16 bit RGB. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| | * hw/pl110: Model the PL111 CLCD controllerPeter Maydell2011-08-173-28/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Model the PL111 CLCD controller. This is a minor variation on the PL110; the major programmer visible differences are support for hardware cursor (unimplemented) and two new pixel formats. Since syborg_fb.c borrows the pl11x pixel drawing routines, we also update it to cope with the new slightly larger array of function pointers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | guest agent: remove uneeded dependenciesMichael Roth2011-08-213-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch tries to cull any uneeded library dependencies from the guest agent to improve portability across various distros. We do so by being as explicit as possible about in-tree dependencies rather than relying on existing *-obj-y targets, and by manually setting LIBS for the qemu-ga target to avoid pulling in LIBS_TOOLS libraries discovered by configure. Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * | guest agent: remove g_strcmp0 usageMichael Roth2011-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | g_strcmp0 isn't in all version of glib 2.0, so don't use it to avoid build breakage on older distros. Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * | memory: crack wide ioport accesses into smaller ones when neededAvi Kivity2011-08-211-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory API supports cracking wide accesses into narrower ones when needed; but this was no implemented for the pio address space, causing lsi53c895a's IO BAR to malfunction. Fix by correctly cracking wide accesses when needed. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * | memory: abstract cracking of write access ops into a functionAvi Kivity2011-08-211-41/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | The memory API automatically cracks large reads and writes into smaller ones when needed. Factor out this mechanism, which is now duplicated between memory reads and memory writes, into a function. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * | escc: replace DPRINTFs with tracepointsBlue Swirl2011-08-212-46/+29
| | | | | | | | | | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | m48t59: avoid structure holes spotted by paholeBlue Swirl2011-08-211-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct M48t59State { uint32_t type; /* 0 4 */ /* XXX 4 bytes hole, try to pack */ qemu_irq IRQ; /* 8 8 */ uint32_t io_base; /* 16 4 */ uint32_t size; /* 20 4 */ time_t time_offset; /* 24 8 */ time_t stop_time; /* 32 8 */ struct tm alarm; /* 40 56 */ /* --- cacheline 1 boundary (64 bytes) was 32 bytes ago --- */ struct QEMUTimer * alrm_timer; /* 96 8 */ struct QEMUTimer * wd_timer; /* 104 8 */ uint8_t lock; /* 112 1 */ /* XXX 1 byte hole, try to pack */ uint16_t addr; /* 114 2 */ /* XXX 4 bytes hole, try to pack */ uint8_t * buffer; /* 120 8 */ /* --- cacheline 2 boundary (128 bytes) --- */ /* size: 128, cachelines: 2 */ /* sum members: 119, holes: 3, sum holes: 9 */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | escc: avoid structure holes spotted by paholeBlue Swirl2011-08-211-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Edited report from pahole on amd64 host: struct ChannelState { ... ChnType type; /* 32 4 */ /* XXX 4 bytes hole, try to pack */ ... uint8_t rregs[16]; /* 66 16 */ /* XXX 2 bytes hole, try to pack */ ... /* size: 392, cachelines: 7 */ /* sum members: 382, holes: 2, sum holes: 6 */ /* padding: 4 */ /* last cacheline: 8 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | fdc: avoid structure holes spotted by paholeBlue Swirl2011-08-211-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Edited report from pahole on amd64 host: struct FDCtrl { uint8_t version; /* 0 1 */ /* XXX 7 bytes hole, try to pack */ qemu_irq irq; /* 8 8 */ int dma_chann; /* 16 4 */ /* XXX 4 bytes hole, try to pack */ ... uint8_t status2; /* 42 1 */ /* XXX 5 bytes hole, try to pack */ uint8_t * fifo; /* 48 8 */ ... uint8_t pwrd; /* 76 1 */ /* XXX 3 bytes hole, try to pack */ int sun4m; /* 80 4 */ uint8_t num_floppies; /* 84 1 */ /* XXX 3 bytes hole, try to pack */ FDrive drives[2]; /* 88 64 */ /* --- cacheline 2 boundary (128 bytes) was 24 bytes ago --- */ int reset_sensei; /* 152 4 */ /* size: 160, cachelines: 3 */ /* sum members: 134, holes: 5, sum holes: 22 */ /* padding: 4 */ /* last cacheline: 32 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | pcnet: avoid structure holes spotted by paholeBlue Swirl2011-08-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Edited report from pahole on amd64 host: struct PCNetState_st { ... uint16_t bcr[32]; /* 340 64 */ /* XXX 4 bytes hole, try to pack */ ... int tx_busy; /* 4520 4 */ /* XXX 4 bytes hole, try to pack */ qemu_irq irq; /* 4528 8 */ void (*phys_mem_read)(void *, target_phys_addr_t, uint8_t *, int, int); /* 4536 8 */ /* --- cacheline 71 boundary (4544 bytes) --- */ void (*phys_mem_write)(void *, target_phys_addr_t, uint8_t *, int, int); /* 4544 8 */ void * dma_opaque; /* 4552 8 */ int looptest; /* 4560 4 */ /* size: 4568, cachelines: 72 */ /* sum members: 4556, holes: 2, sum holes: 8 */ /* padding: 4 */ /* last cacheline: 24 bytes */ }; /* definitions: 2 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | esp: avoid structure holes spotted by paholeBlue Swirl2011-08-211-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct ESPState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ uint32_t it_shift; /* 5648 4 */ /* XXX 4 bytes hole, try to pack */ qemu_irq irq; /* 5656 8 */ uint8_t rregs[16]; /* 5664 16 */ uint8_t wregs[16]; /* 5680 16 */ /* --- cacheline 89 boundary (5696 bytes) --- */ int32_t ti_size; /* 5696 4 */ uint32_t ti_rptr; /* 5700 4 */ uint32_t ti_wptr; /* 5704 4 */ uint8_t ti_buf[16]; /* 5708 16 */ uint32_t status; /* 5724 4 */ uint32_t dma; /* 5728 4 */ /* XXX 4 bytes hole, try to pack */ SCSIBus bus; /* 5736 2120 */ /* --- cacheline 122 boundary (7808 bytes) was 48 bytes ago --- */ SCSIDevice * current_dev; /* 7856 8 */ SCSIRequest * current_req; /* 7864 8 */ /* --- cacheline 123 boundary (7872 bytes) --- */ uint8_t cmdbuf[16]; /* 7872 16 */ uint32_t cmdlen; /* 7888 4 */ uint32_t do_cmd; /* 7892 4 */ uint32_t dma_left; /* 7896 4 */ uint32_t dma_counter; /* 7900 4 */ uint8_t * async_buf; /* 7904 8 */ uint32_t async_len; /* 7912 4 */ /* XXX 4 bytes hole, try to pack */ ESPDMAMemoryReadWriteFunc dma_memory_read; /* 7920 8 */ ESPDMAMemoryReadWriteFunc dma_memory_write; /* 7928 8 */ /* --- cacheline 124 boundary (7936 bytes) --- */ void * dma_opaque; /* 7936 8 */ int dma_enabled; /* 7944 4 */ /* XXX 4 bytes hole, try to pack */ void (*dma_cb)(ESPState *); /* 7952 8 */ /* size: 7960, cachelines: 125 */ /* sum members: 7944, holes: 4, sum holes: 16 */ /* last cacheline: 24 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | sun4m: avoid structure holes spotted by paholeBlue Swirl2011-08-211-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Edited report from pahole on amd64 host: struct sun4c_hwdef { ... uint8_t nvram_machine_id; /* 112 1 */ /* XXX 1 byte hole, try to pack */ ... /* size: 136, cachelines: 3 */ /* sum members: 135, holes: 1, sum holes: 1 */ /* last cacheline: 8 bytes */ }; /* definitions: 1 */ struct sun4d_hwdef { ... uint8_t nvram_machine_id; /* 128 1 */ /* XXX 1 byte hole, try to pack */ ... /* size: 152, cachelines: 3 */ /* sum members: 151, holes: 1, sum holes: 1 */ /* last cacheline: 24 bytes */ }; /* definitions: 1 */ struct sun4m_hwdef { ... uint8_t nvram_machine_id; /* 260 1 */ /* XXX 1 byte hole, try to pack */ uint16_t machine_id; /* 262 2 */ uint32_t iommu_version; /* 264 4 */ /* XXX 4 bytes hole, try to pack */ ... /* size: 288, cachelines: 5 */ /* sum members: 283, holes: 2, sum holes: 5 */ /* last cacheline: 32 bytes */ }; /* definitions: 1 */ Fix by rearranging the structures to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | tcx: avoid structure holes spotted by paholeBlue Swirl2011-08-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct TCXState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ target_phys_addr_t addr; /* 5648 8 */ DisplayState * ds; /* 5656 8 */ uint8_t * vram; /* 5664 8 */ uint32_t * vram24; /* 5672 8 */ uint32_t * cplane; /* 5680 8 */ ram_addr_t vram_offset; /* 5688 8 */ /* --- cacheline 89 boundary (5696 bytes) --- */ ram_addr_t vram24_offset; /* 5696 8 */ ram_addr_t cplane_offset; /* 5704 8 */ uint32_t vram_size; /* 5712 4 */ uint16_t width; /* 5716 2 */ uint16_t height; /* 5718 2 */ uint16_t depth; /* 5720 2 */ uint8_t r[256]; /* 5722 256 */ /* --- cacheline 93 boundary (5952 bytes) was 26 bytes ago --- */ uint8_t g[256]; /* 5978 256 */ /* --- cacheline 97 boundary (6208 bytes) was 26 bytes ago --- */ uint8_t b[256]; /* 6234 256 */ /* XXX 2 bytes hole, try to pack */ /* --- cacheline 101 boundary (6464 bytes) was 28 bytes ago --- */ uint32_t palette[256]; /* 6492 1024 */ /* --- cacheline 117 boundary (7488 bytes) was 28 bytes ago --- */ uint8_t dac_index; /* 7516 1 */ uint8_t dac_state; /* 7517 1 */ /* size: 7520, cachelines: 118 */ /* sum members: 7516, holes: 1, sum holes: 2 */ /* padding: 2 */ /* last cacheline: 32 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | sun4m_iommu: avoid structure holes spotted by paholeBlue Swirl2011-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct IOMMUState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ uint32_t regs[4096]; /* 5648 16384 */ /* --- cacheline 344 boundary (22016 bytes) was 16 bytes ago --- */ target_phys_addr_t iostart; /* 22032 8 */ uint32_t version; /* 22040 4 */ /* XXX 4 bytes hole, try to pack */ qemu_irq irq; /* 22048 8 */ /* size: 22056, cachelines: 345 */ /* sum members: 22052, holes: 1, sum holes: 4 */ /* last cacheline: 40 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | slavio_intctl: avoid structure holes spotted by paholeBlue Swirl2011-08-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct SLAVIO_INTCTLState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ uint32_t intregm_pending; /* 5648 4 */ uint32_t intregm_disabled; /* 5652 4 */ uint32_t target_cpu; /* 5656 4 */ /* XXX 4 bytes hole, try to pack */ qemu_irq cpu_irqs[16][16]; /* 5664 2048 */ /* --- cacheline 120 boundary (7680 bytes) was 32 bytes ago --- */ SLAVIO_CPUINTCTLState slaves[16]; /* 7712 384 */ /* --- cacheline 126 boundary (8064 bytes) was 32 bytes ago --- */ /* size: 8096, cachelines: 127 */ /* sum members: 8092, holes: 1, sum holes: 4 */ /* last cacheline: 32 bytes */ }; /* definitions: 1 */ struct SLAVIO_CPUINTCTLState { uint32_t intreg_pending; /* 0 4 */ /* XXX 4 bytes hole, try to pack */ struct SLAVIO_INTCTLState * master; /* 8 8 */ uint32_t cpu; /* 16 4 */ uint32_t irl_out; /* 20 4 */ /* size: 24, cachelines: 1 */ /* sum members: 20, holes: 1, sum holes: 4 */ /* last cacheline: 24 bytes */ }; /* definitions: 1 */ Fix by rearranging the structures to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | slavio_misc: avoid structure holes spotted by paholeBlue Swirl2011-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct MiscState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ qemu_irq irq; /* 5648 8 */ uint32_t dummy; /* 5656 4 */ uint8_t config; /* 5660 1 */ uint8_t aux1; /* 5661 1 */ uint8_t aux2; /* 5662 1 */ uint8_t diag; /* 5663 1 */ uint8_t mctrl; /* 5664 1 */ uint8_t sysctrl; /* 5665 1 */ uint16_t leds; /* 5666 2 */ /* XXX 4 bytes hole, try to pack */ qemu_irq fdc_tc; /* 5672 8 */ /* size: 5680, cachelines: 89 */ /* sum members: 5676, holes: 1, sum holes: 4 */ /* last cacheline: 48 bytes */ }; /* definitions: 1 */ Fix by rearranging the structure to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | slavio_timer: avoid structure holes spotted by paholeBlue Swirl2011-08-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Report from pahole on amd64 host: struct SLAVIO_TIMERState { SysBusDevice busdev; /* 0 5648 */ /* --- cacheline 88 boundary (5632 bytes) was 16 bytes ago --- */ uint32_t num_cpus; /* 5648 4 */ /* XXX 4 bytes hole, try to pack */ CPUTimerState cputimer[17]; /* 5656 816 */ /* --- cacheline 101 boundary (6464 bytes) was 8 bytes ago --- */ uint32_t cputimer_mode; /* 6472 4 */ /* size: 6480, cachelines: 102 */ /* sum members: 6472, holes: 1, sum holes: 4 */ /* padding: 4 */ /* last cacheline: 16 bytes */ }; /* definitions: 1 */ struct CPUTimerState { qemu_irq irq; /* 0 8 */ ptimer_state * timer; /* 8 8 */ uint32_t count; /* 16 4 */ uint32_t counthigh; /* 20 4 */ uint32_t reached; /* 24 4 */ /* XXX 4 bytes hole, try to pack */ uint64_t limit; /* 32 8 */ uint32_t running; /* 40 4 */ /* size: 48, cachelines: 1 */ /* sum members: 40, holes: 1, sum holes: 4 */ /* padding: 4 */ /* last cacheline: 48 bytes */ }; /* definitions: 1 */ Fix by rearranging the structures to avoid padding. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | monitor: Prevent sign-extension of 32-bit addresses printed by info tlbAustin Clements2011-08-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the same fix that was recently applied to info mem. Before this change, info tlb output looked like: ffffffffffffc000: 000000000fffc000 --------W ffffffffffffd000: 000000000fffd000 --------W ffffffffffffe000: 000000000fffe000 --------W fffffffffffff000: 000000000ffff000 --------W With this change, it looks like 00000000ffffc000: 000000000fffc000 --------W 00000000ffffd000: 000000000fffd000 --------W 00000000ffffe000: 000000000fffe000 --------W 00000000fffff000: 000000000ffff000 --------W Signed-off-by: Austin Clements <amdragon@mit.edu> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| * | Merge branch 'queues/slirp' of git://git.kiszka.org/qemuBlue Swirl2011-08-212-6/+6
| |\ \ | | | | | | | | | | | | | | | | * 'queues/slirp' of git://git.kiszka.org/qemu: slirp: Fix bit field types in IP header structs
| | * | slirp: Fix bit field types in IP header structsJan Kiszka2011-08-142-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -mms-bitfields prevents that the bitfields in current IP header structs are packed into a single byte as it is required. Fix this by using uint8_t as backing type. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
* | | | tcg/ppc64: implement not_i32/64 and ext32u_i64malc2011-08-222-3/+16
| | | | | | | | | | | | | | | | Signed-off-by: malc <av1474@comtv.ru>
* | | | tcg/ppc32: implement deposit_i32malc2011-08-222-1/+13
|/ / / | | | | | | | | | Signed-off-by: malc <av1474@comtv.ru>
* | | tcg-ia64: Fix typos in AREG0 setup in prologue.Richard Henderson2011-08-211-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | tcg-hppa: Fix CPU_TEMP_BUF_NLONGS oversight.Richard Henderson2011-08-211-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | tcg: Constant fold neg, andc, orc, eqv, nand, nor.Richard Henderson2011-08-211-0/+27
| | | | | | | | | | | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | tcg: Always define all of the TCGOpcode enum members.Richard Henderson2011-08-2114-1008/+837
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | tcg: Add and use TCG_OPF_64BIT.Richard Henderson2011-08-214-131/+67
| | | | | | | | | | | | | | | | | | | | | | | | This allows the simplification of the op_bits function from tcg/optimize.c. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | Check for presence of compiler -pthread flag.Brad2011-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OpenBSD / FreeBSD and some other OS's require the use of cc -pthread to link threaded programs so have QEMU's configure script check for the presence of the flag and use it if so. Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | Convert last qemu_free and qemu_malloc usesBlue Swirl2011-08-213-5/+5
| | | | | | | | | | | | | | | | | | | | | 7267c0947d7e8ae5dff7bafd932c3bc285f43e5c missed a few cases, fix them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | monitor: Show combined protection bits in "info mem"Austin Clements2011-08-211-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, "info mem" considered and displayed only the last-level protection bits for a memory range, which doesn't accurrately represent the protection of that range. Now it shows the combined protection. Signed-off-by: Austin Clements <amdragon@mit.edu> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | monitor: Fix "info mem" to print the last memory rangeAustin Clements2011-08-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | "info mem" groups its output into contiguous ranges with identical protection bits, but previously forgot to print the last range. Signed-off-by: Austin Clements <amdragon@mit.edu> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | monitor: Prevent sign-extension of 32-bit addresses printed by info memAustin Clements2011-08-211-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, on 32-bit i386, info mem used signed 32-bit int's to store the page table indexes. As a result, address calculation was done in 32 bits and then incorrectly sign-extended to 64 bits, yielding output like ffffffffef000000-ffffffffef031000 0000000000031000 ur- ffffffffef7bc000-ffffffffef7bd000 0000000000001000 urw ffffffffef7bd000-ffffffffef7be000 0000000000001000 ur- This makes these indexes unsigned, which yields correct output 00000000ef000000-00000000ef031000 0000000000031000 ur- 00000000ef7bc000-00000000ef7bd000 0000000000001000 urw 00000000ef7bd000-00000000ef7be000 0000000000001000 ur- Signed-off-by: Austin Clements <amdragon@mit.edu> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | w32: Fix format string regressionStefan Weil2011-08-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 953ffe0f935f40c0d6061d69e76e0339393b54f8 introduced FMT_pid which is wrong for w32 and w64 getpid(): those getpid() implementations always return an int value. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | w64: Add definition of FMT_pidStefan Weil2011-08-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | For mingw-w64, pid_t is _pid_t which is __int64, so this platform needs its own definition of FMT_pid. Reviewed-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | Fix conversions from pointer to tcg_target_longStefan Weil2011-08-212-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long. These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. See 4b4a72e55660abf7efe85aca78762dcfea5519ad which fixed the same issue for the other targets. Cc: Alexander Graf <agraf@suse.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Guan Xuetao<gxt@mprc.pku.edu.cn> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | | Remove remenants of qemu_mallocAnthony Liguori2011-08-212-5/+5
| | | | | | | | | | | | | | | | | | This covers the various check commands Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | | Update HACKING to refer to g_malloc instead of qemu_mallocAnthony Liguori2011-08-211-3/+3
| | | | | | | | | | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | | Add trace points for g_malloc/g_free functionsAnthony Liguori2011-08-201-0/+27
| | | | | | | | | | | | | | | | | | Derived from a patch submitted by Avi Kivity. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | | Remove qemu_malloc/qemu_freeAnthony Liguori2011-08-205-107/+3
| | | | | | | | | | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | | Use glib memory allocation and free functionsAnthony Liguori2011-08-20357-1674/+1672
| | | | | | | | | | | | | | | | | | qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | | Make glib mandatory and fixup utils appropriatelyAnthony Liguori2011-08-204-4/+7
| | | | | | | | | | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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