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* target-arm: A64: Add support for FCVT between half, single and doublePeter Maydell2014-01-073-1/+96
* target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell2014-01-073-1/+191
* target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton2014-01-071-3/+20
* target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf2014-01-073-1/+200
* target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton2014-01-072-1/+26
* target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell2014-01-071-0/+9
* target-arm: Rename A32 VFP conversion helpersWill Newton2014-01-073-24/+35
* target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton2014-01-071-14/+14
* softfloat: Add support for ties-away roundingPeter Maydell2014-01-072-1/+56
* softfloat: Refactor code handling various rounding modesPeter Maydell2014-01-071-164/+241
* softfloat: Add float16 <=> float64 conversion functionsPeter Maydell2014-01-072-0/+77
* softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16SubnormalPeter Maydell2014-01-071-84/+125
* softfloat: Provide complete set of accessors for fp statePeter Maydell2014-01-072-18/+36
* softfloat: Fix float64_to_uint32_round_to_zeroTom Musta2014-01-071-8/+7
* softfloat: Fix float64_to_uint32Tom Musta2014-01-071-8/+7
* softfloat: Fix float64_to_uint64_round_to_zeroTom Musta2014-01-071-7/+5
* softfloat: Add float32_to_uint64()Tom Musta2014-01-072-0/+47
* softfloat: Fix factor 2 error for scalbn on denormal inputsPeter Maydell2014-01-071-8/+21
* softfloat: Only raise Invalid when conversions to int are out of rangePeter Maydell2014-01-071-12/+16
* softfloat: Fix float64_to_uint64Tom Musta2014-01-071-8/+93
* softfloat: Make the int-to-float functions take exact-width typesPeter Maydell2014-01-072-26/+26
* softfloat: Add 16 bit integer to float conversionsPeter Maydell2014-01-071-0/+21
* softfloat: Add float to 16bit integer conversions.Will Newton2014-01-072-0/+84
* softfloat: Fix exception flag handling for float32_to_float16()Peter Maydell2014-01-071-39/+66
* hw: arm_gic: Introduce gic_set_priority functionChristoffer Dall2014-01-072-5/+11
* arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGERChristoffer Dall2014-01-074-12/+12
* target-arm: fix build with gcc 4.8.2Michael S. Tsirkin2014-01-071-0/+6
* arm/xilinx_zynq: Always instantiate the GEMsPeter Crosthwaite2014-01-071-11/+6
* target-arm: remove raw_read|write duplicationPeter Crosthwaite2014-01-071-10/+2
* target-arm: use c13_context field for CONTEXTIDRSergey Fedorov2014-01-071-1/+1
* char/cadence_uart: Implement Tx flow controlPeter Crosthwaite2014-01-071-2/+29
* char/cadence_uart: Delete redundant rx rst logicPeter Crosthwaite2014-01-071-2/+0
* char/cadence_uart: Use the TX fifo for transmissionPeter Crosthwaite2014-01-071-1/+16
* char/cadence_uart: Fix can_receive logicPeter Crosthwaite2014-01-071-1/+9
* char/cadence_uart: Remove TX timer & add TX FIFO statePeter Crosthwaite2014-01-071-31/+13
* char/cadence_uart: Define Missing SR/ISR fieldsPeter Crosthwaite2014-01-071-0/+4
* char/cadence_uart: Simplify status generationPeter Crosthwaite2014-01-071-25/+8
* char/cadence_uart: s/r_fifo/rx_fifoPeter Crosthwaite2014-01-071-4/+4
* char/cadence_uart: Fix reset.Peter Crosthwaite2014-01-071-3/+4
* char/cadence_uart: Add missing uart_update_statePeter Crosthwaite2014-01-071-0/+1
* char/cadence_uart: Mark struct fields as public/privatePeter Crosthwaite2014-01-071-0/+2
* target-arm: Give the FPSCR rounding modes namesAlexander Graf2014-01-072-4/+13
* target-arm: A64: Add support for floating point cond selectClaudio Fontana2014-01-071-1/+44
* target-arm: A64: Add support for floating point conditional compareClaudio Fontana2014-01-071-1/+34
* target-arm: A64: Add support for floating point compareClaudio Fontana2014-01-073-1/+113
* target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf2014-01-071-1/+31
* target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf2014-01-071-1/+94
* target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf2014-01-071-1/+181
* target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell2014-01-074-52/+20
* target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell2014-01-071-34/+35
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