hqemu - HQEMU

	Commit message (Expand)	Author	Age	Files	Lines
*	target-arm: Implement auxiliary fault status registers	Peter Maydell	2014-04-17	1	-0/+9
*	target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8	Peter Maydell	2014-04-17	1	-5/+91
*	target-arm: Don't expose wildcard ID register definitions for ARMv8	Peter Maydell	2014-04-17	1	-18/+43
*	target-arm: Remove THUMB2EE feature from AArch64 'any' CPU	Peter Maydell	2014-04-17	1	-1/+0
*	target-arm: Implement ISR_EL1 register	Peter Maydell	2014-04-17	1	-0/+18
*	target-arm: Implement AArch64 view of ACTLR	Peter Maydell	2014-04-17	1	-1/+2
*	target-arm: Implement AArch64 view of CONTEXTIDR	Peter Maydell	2014-04-17	2	-16/+19
*	target-arm: Implement AArch64 views of AArch32 ID registers	Peter Maydell	2014-04-17	1	-29/+44
*	target-arm: Add Cortex-A57 processor	Peter Maydell	2014-04-17	1	-0/+43
*	target-arm: Implement ARMv8 MVFR registers	Peter Maydell	2014-04-17	5	-2/+23
*	target-arm: Implement AArch64 EL1 exception handling	Rob Herring	2014-04-17	6	-0/+143
*	target-arm: Move arm_log_exception() into internals.h	Peter Maydell	2014-04-17	2	-31/+31
*	target-arm: Implement AArch64 SPSR_EL1	Peter Maydell	2014-04-17	5	-11/+40
*	target-arm: Implement SP_EL0, SP_EL1	Peter Maydell	2014-04-17	6	-7/+100
*	target-arm: Add AArch64 ELR_EL1 register.	Peter Maydell	2014-04-17	4	-4/+24
*	target-arm: Implement AArch64 views of fault status and data registers	Rob Herring	2014-04-17	3	-18/+29
*	target-arm: Use dedicated CPU state fields for ARM946 access bit registers	Peter Maydell	2014-04-17	2	-10/+16
*	target-arm: A64: Implement DC ZVA	Peter Maydell	2014-04-17	7	-6/+180
*	target-arm: Don't mention PMU in debug feature register	Peter Maydell	2014-04-17	1	-1/+6
*	target-arm: Add v8 mmu translation support	Rob Herring	2014-04-17	1	-32/+77
*	target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1	Peter Maydell	2014-04-17	2	-1/+40
*	target-arm: A64: Add assertion that FP access was checked	Peter Maydell	2014-04-17	2	-24/+59
*	target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set	Peter Maydell	2014-04-17	5	-6/+320
*	target-arm: Provide syndrome information for MMU faults	Rob Herring	2014-04-17	2	-0/+25
*	target-arm: Add support for generating exceptions with syndrome information	Peter Maydell	2014-04-17	6	-54/+140
*	target-arm: Provide correct syndrome information for cpreg access traps	Peter Maydell	2014-04-17	5	-7/+184
*	target-arm: Define exception record for AArch64 exceptions	Peter Maydell	2014-04-17	4	-41/+56
*	target-arm: Implement AArch64 DAIF system register	Peter Maydell	2014-04-17	2	-1/+21
*	target-arm: Split out private-to-target functions into internals.h	Peter Maydell	2014-04-17	8	-20/+55
*	Merge remote-tracking branch 'remotes/rth/tcg-aarch-6-5' into staging	Peter Maydell	2014-04-17	3	-558/+628
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\| *	tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr	Richard Henderson	2014-04-16	1	-9/+7
\| *	tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst	Richard Henderson	2014-04-16	1	-5/+6
\| *	tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313	Richard Henderson	2014-04-16	1	-87/+89
\| *	tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op	Richard Henderson	2014-04-16	1	-83/+32
\| *	tcg-aarch64: Introduce tcg_out_insn_3507	Richard Henderson	2014-04-16	1	-24/+33
\| *	tcg-aarch64: Support stores of zero	Richard Henderson	2014-04-16	1	-16/+19
\| *	tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst	Richard Henderson	2014-04-16	2	-60/+31
\| *	tcg-aarch64: Pass qemu_ld/st arguments directly	Richard Henderson	2014-04-16	1	-32/+17
\| *	tcg-aarch64: Use TCGMemOp in qemu_ld/st	Richard Henderson	2014-04-16	1	-68/+63
\| *	tcg-aarch64: Use ADR to pass the return address to the ld/st helpers	Richard Henderson	2014-04-16	1	-2/+9
\| *	tcg-aarch64: Use tcg_out_call for qemu_ld/st	Richard Henderson	2014-04-16	1	-4/+2
\| *	tcg-aarch64: Avoid add with zero in tlb load	Richard Henderson	2014-04-16	1	-9/+19
\| *	tcg-aarch64: Implement tcg_register_jit	Richard Henderson	2014-04-16	1	-15/+69
\| *	tcg-aarch64: Introduce tcg_out_insn_3314	Richard Henderson	2014-04-16	1	-67/+33
\| *	tcg-aarch64: Reuse LR in translated code	Richard Henderson	2014-04-16	2	-33/+33
\| *	tcg-aarch64: Use CBZ and CBNZ	Richard Henderson	2014-04-16	1	-2/+24
\| *	tcg-aarch64: Create tcg_out_brcond	Richard Henderson	2014-04-16	1	-20/+14
\| *	tcg-aarch64: Use symbolic names for branches	Richard Henderson	2014-04-16	1	-31/+43
\| *	tcg-aarch64: Use adrp in tcg_out_movi	Richard Henderson	2014-04-16	1	-0/+23
\| *	tcg-aarch64: Special case small constants in tcg_out_movi	Richard Henderson	2014-04-16	1	-0/+10