hqemu - HQEMU

	Commit message (Expand)	Author	Age	Files	Lines
*	spapr-rtas: add ibm, (get\|set)-system-parameter	Alexey Kardashevskiy	2013-12-20	2	-0/+49
*	spapr-rtas: replace return code constants with macros	Alexey Kardashevskiy	2013-12-20	7	-67/+74
*	target-ppc: move POWER7+ to a separate family	Alexey Kardashevskiy	2013-12-20	3	-1/+41
*	Add stxvw4x	Tom Musta	2013-12-20	1	-0/+28
*	Add stxsdx	Tom Musta	2013-12-20	1	-0/+15
*	Add lxvw4x	Tom Musta	2013-12-20	1	-0/+29
*	Add lxvdsx	Tom Musta	2013-12-20	1	-0/+16
*	Add lxsdx	Tom Musta	2013-12-20	1	-0/+16
*	Add xxpermdi	Tom Musta	2013-12-20	1	-1/+40
*	Add stxvd2x	Tom Musta	2013-12-20	1	-0/+18
*	Add lxvd2x	Tom Musta	2013-12-20	1	-0/+18
*	Add VSR to Global Registers	Tom Musta	2013-12-20	1	-0/+27
*	Add VSX Instruction Decoders	Tom Musta	2013-12-20	1	-0/+11
*	Add MSR VSX and Associated Exception	Tom Musta	2013-12-20	4	-2/+18
*	Declare and Enable VSX	Tom Musta	2013-12-20	2	-3/+8
*	powerpc: add PVR mask support	Alexey Kardashevskiy	2013-12-20	5	-0/+56
*	target-ppc: add stubs for KVM breakpoints	Greg Kurz	2013-12-20	1	-0/+28
*	Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131217' into st...	Anthony Liguori	2013-12-19	50	-694/+5229
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\| *	MAINTAINERS: add myself to maintain allwinner-a10	liguang	2013-12-17	1	-0/+7
\| *	hw/arm: add cubieboard support	liguang	2013-12-17	3	-1/+71
\| *	hw/arm: add allwinner a10 SoC support	liguang	2013-12-17	4	-0/+140
\| *	hw/intc: add allwinner A10 interrupt controller	liguang	2013-12-17	4	-0/+242
\| *	hw/timer: add allwinner a10 timer	liguang	2013-12-17	4	-0/+316
\| *	vmstate: Add support for an array of ptimer_state *	Peter Maydell	2013-12-17	2	-0/+14
\| *	MAINTAINERS: Document 'Canon DIGIC' machine	Antony Pavlov	2013-12-17	1	-0/+6
\| *	hw/arm/digic: add NOR ROM support	Antony Pavlov	2013-12-17	1	-0/+78
\| *	hw/arm/digic: add UART support	Antony Pavlov	2013-12-17	5	-0/+261
\| *	hw/arm/digic: add timer support	Antony Pavlov	2013-12-17	5	-0/+244
\| *	hw/arm/digic: prepare DIGIC-based boards support	Antony Pavlov	2013-12-17	3	-0/+86
\| *	hw/arm: add very initial support for Canon DIGIC SoC	Antony Pavlov	2013-12-17	4	-0/+108
\| *	target-arm: A64: add support for logical (immediate) insns	Alexander Graf	2013-12-17	1	-2/+173
\| *	target-arm: A64: add support for 1-src CLS insn	Claudio Fontana	2013-12-17	3	-1/+31
\| *	host-utils: add clrsb32/64 - count leading redundant sign bits	Claudio Fontana	2013-12-17	1	-0/+32
\| *	target-arm: A64: add support for bitfield insns	Claudio Fontana	2013-12-17	1	-2/+54
\| *	target-arm: A64: add support for 1-src REV insns	Claudio Fontana	2013-12-17	1	-1/+72
\| *	target-arm: A64: add support for 1-src RBIT insn	Alexander Graf	2013-12-17	3	-0/+39
\| *	target-arm: A64: add support for 1-src data processing and CLZ	Claudio Fontana	2013-12-17	3	-2/+56
\| *	target-arm: A64: add support for 2-src shift reg insns	Alexander Graf	2013-12-17	1	-0/+22
\| *	target-arm: A64: add support for 2-src data processing and DIV	Alexander Graf	2013-12-17	3	-2/+93
\| *	target-arm: A64: add support for EXTR	Alexander Graf	2013-12-17	1	-2/+47
\| *	target-arm: A64: add support for ADR and ADRP	Alexander Graf	2013-12-17	1	-2/+23
\| *	target-arm: A64: add support for logical (shifted register)	Alexander Graf	2013-12-17	1	-6/+191
\| *	target-arm: A64: add support for conditional select	Claudio Fontana	2013-12-17	1	-2/+65
\| *	target-arm: A64: add support for compare and branch imm	Alexander Graf	2013-12-17	1	-2/+44
\| *	target-arm: A64: add support for 'test and branch' imm	Alexander Graf	2013-12-17	1	-2/+25
\| *	target-arm: A64: add support for conditional branches	Alexander Graf	2013-12-17	3	-7/+38
\| *	target-arm: A64: add support for BR, BLR and RET insns	Alexander Graf	2013-12-17	1	-2/+41
\| *	target-arm: A64: add support for B and BL insns	Alexander Graf	2013-12-17	2	-2/+65
\| *	target-arm: A64: expand decoding skeleton for system instructions	Claudio Fontana	2013-12-17	1	-2/+129
\| *	target-arm: A64: provide skeleton for a64 insn decoding	Claudio Fontana	2013-12-17	1	-8/+362