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-rw-r--r--target-ppc/op_mem.h68
1 files changed, 0 insertions, 68 deletions
diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h
index 37fc488..1de7f1e 100644
--- a/target-ppc/op_mem.h
+++ b/target-ppc/op_mem.h
@@ -20,74 +20,6 @@
#include "op_mem_access.h"
-/*** Integer load and store strings ***/
-void OPPROTO glue(op_lswi, MEMSUFFIX) (void)
-{
- glue(do_lsw, MEMSUFFIX)(PARAM1);
- RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_lswi_64, MEMSUFFIX) (void)
-{
- glue(do_lsw_64, MEMSUFFIX)(PARAM1);
- RETURN();
-}
-#endif
-
-/* PPC32 specification says we must generate an exception if
- * rA is in the range of registers to be loaded.
- * In an other hand, IBM says this is valid, but rA won't be loaded.
- * For now, I'll follow the spec...
- */
-void OPPROTO glue(op_lswx, MEMSUFFIX) (void)
-{
- /* Note: T1 comes from xer_bc then no cast is needed */
- if (likely(T1 != 0)) {
- if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
- (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
- raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL |
- POWERPC_EXCP_INVAL_LSWX);
- } else {
- glue(do_lsw, MEMSUFFIX)(PARAM1);
- }
- }
- RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_lswx_64, MEMSUFFIX) (void)
-{
- /* Note: T1 comes from xer_bc then no cast is needed */
- if (likely(T1 != 0)) {
- if (unlikely((PARAM1 < PARAM2 && (PARAM1 + T1) > PARAM2) ||
- (PARAM1 < PARAM3 && (PARAM1 + T1) > PARAM3))) {
- raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL |
- POWERPC_EXCP_INVAL_LSWX);
- } else {
- glue(do_lsw_64, MEMSUFFIX)(PARAM1);
- }
- }
- RETURN();
-}
-#endif
-
-void OPPROTO glue(op_stsw, MEMSUFFIX) (void)
-{
- glue(do_stsw, MEMSUFFIX)(PARAM1);
- RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO glue(op_stsw_64, MEMSUFFIX) (void)
-{
- glue(do_stsw_64, MEMSUFFIX)(PARAM1);
- RETURN();
-}
-#endif
-
/* Load and set reservation */
void OPPROTO glue(op_lwarx, MEMSUFFIX) (void)
{
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