summaryrefslogtreecommitdiffstats
path: root/target-mips/TODO
diff options
context:
space:
mode:
Diffstat (limited to 'target-mips/TODO')
-rw-r--r--target-mips/TODO4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/TODO b/target-mips/TODO
index 9101881..2a3546f 100644
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -16,7 +16,7 @@ General
Existing documentation is x86-centric.
- Reverse endianness bit not implemented
- The TLB emulation is very inefficient:
- Qemu's softmmu implements a x86-style MMU, with separate entries
+ QEMU's softmmu implements a x86-style MMU, with separate entries
for read/write/execute, a TLB index which is just a modulo of the
virtual address, and a set of TLBs for each user/kernel/supervisor
MMU mode.
@@ -25,7 +25,7 @@ General
up to 256 ASID tags as additional matching criterion (which roughly
equates to 256 MMU modes). It also has a global flag which causes
entries to match regardless of ASID.
- To cope with these differences, Qemu currently flushes the TLB at
+ To cope with these differences, QEMU currently flushes the TLB at
each ASID change. Using the MMU modes to implement ASIDs hinges on
implementing the global bit efficiently.
- save/restore of the CPU state is not implemented (see machine.c).
OpenPOWER on IntegriCloud