diff options
author | Blue Swirl <blauwirbel@gmail.com> | 2011-09-11 15:54:18 +0000 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-01 09:28:40 +0000 |
commit | bf4b9889ab02f528a7e3944d7cf64ddd77f9ad46 (patch) | |
tree | 7683d4ca4409ab41944360a9d573cda77c9757e1 /trace-events | |
parent | b39491a83d0b9d573d5fd21163f61f66a11b54b9 (diff) | |
download | hqemu-bf4b9889ab02f528a7e3944d7cf64ddd77f9ad46.zip hqemu-bf4b9889ab02f528a7e3944d7cf64ddd77f9ad46.tar.gz |
ESP: convert to trace framework
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'trace-events')
-rw-r--r-- | trace-events | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/trace-events b/trace-events index a31d9aa..b7ddf14 100644 --- a/trace-events +++ b/trace-events @@ -502,3 +502,34 @@ escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" escc_kbd_command(int val) "Command %d" escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" + +# hw/esp.c +esp_raise_irq(void) "Raise IRQ" +esp_lower_irq(void) "Lower IRQ" +esp_dma_enable(void) "Raise enable" +esp_dma_disable(void) "Lower enable" +esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" +esp_do_busid_cmd(uint8_t busid) "busid 0x%x" +esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" +esp_write_response(uint32_t status) "Transfer status (status=%d)" +esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" +esp_command_complete(void) "SCSI Command complete" +esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" +esp_command_complete_fail(void) "Command failed" +esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" +esp_handle_ti(uint32_t minlen) "Transfer Information len %d" +esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" +esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" +esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" +esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)" +esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)" +esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)" +esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)" +esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)" +esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)" +esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)" +esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)" +esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)" +esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)" +esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)" +esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)" |