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authorJohn Snow <jsnow@redhat.com>2015-02-05 12:41:13 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2015-02-16 15:07:16 +0000
commite83fd96bfab90298beaa8c8a31e48a905564180e (patch)
treeb4f6735beda0c6f555ad2cd17343951e7f1d4da7 /tests
parente77448a385dc72fa671752ec11c84c931f316d09 (diff)
downloadhqemu-e83fd96bfab90298beaa8c8a31e48a905564180e.zip
hqemu-e83fd96bfab90298beaa8c8a31e48a905564180e.tar.gz
libqos/ahci: Add ahci_port_clear helper
Add a helper that assists in clearing out potentially old error and FIS information from an AHCI port's data structures. This ensures we always start with a blank slate for interrupt and FIS receipt information. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1423158090-25580-3-git-send-email-jsnow@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/ahci-test.c9
-rw-r--r--tests/libqos/ahci.c16
-rw-r--r--tests/libqos/ahci.h1
3 files changed, 19 insertions, 7 deletions
diff --git a/tests/ahci-test.c b/tests/ahci-test.c
index c689b62..90647f2 100644
--- a/tests/ahci-test.c
+++ b/tests/ahci-test.c
@@ -687,13 +687,8 @@ static void ahci_test_identify(AHCIQState *ahci)
i = ahci_port_select(ahci);
g_test_message("Selected port %u for test", i);
- /* Clear out this port's interrupts (ignore the init register d2h fis) */
- reg = ahci_px_rreg(ahci, i, AHCI_PX_IS);
- ahci_px_wreg(ahci, i, AHCI_PX_IS, reg);
- g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
-
- /* Wipe the FIS-Receive Buffer */
- qmemset(ahci->port[i].fb, 0x00, 0x100);
+ /* Clear out the FIS Receive area and any pending interrupts. */
+ ahci_port_clear(ahci, i);
/* Create a Command Table buffer. 0x80 is the smallest with a PRDTL of 0. */
/* We need at least one PRD, so round up to the nearest 0x80 multiple. */
diff --git a/tests/libqos/ahci.c b/tests/libqos/ahci.c
index 7ea55f9..3b1b9ba 100644
--- a/tests/libqos/ahci.c
+++ b/tests/libqos/ahci.c
@@ -294,3 +294,19 @@ unsigned ahci_port_select(AHCIQState *ahci)
g_assert(i < 32);
return i;
}
+
+/**
+ * Clear a port's interrupts and status information prior to a test.
+ */
+void ahci_port_clear(AHCIQState *ahci, uint8_t port)
+{
+ uint32_t reg;
+
+ /* Clear out this port's interrupts (ignore the init register d2h fis) */
+ reg = ahci_px_rreg(ahci, port, AHCI_PX_IS);
+ ahci_px_wreg(ahci, port, AHCI_PX_IS, reg);
+ g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), ==, 0);
+
+ /* Wipe the FIS-Recieve Buffer */
+ qmemset(ahci->port[port].fb, 0x00, 0x100);
+}
diff --git a/tests/libqos/ahci.h b/tests/libqos/ahci.h
index b3992e1..39ba94e 100644
--- a/tests/libqos/ahci.h
+++ b/tests/libqos/ahci.h
@@ -432,5 +432,6 @@ void ahci_pci_enable(AHCIQState *ahci);
void start_ahci_device(AHCIQState *ahci);
void ahci_hba_enable(AHCIQState *ahci);
unsigned ahci_port_select(AHCIQState *ahci);
+void ahci_port_clear(AHCIQState *ahci, uint8_t port);
#endif
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