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authorStefan Hajnoczi <stefanha@redhat.com>2014-09-29 16:40:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-09-29 17:31:11 +0100
commit70556264a89a268efba1d7e8e341adcdd7881eb4 (patch)
tree3c56c18b872bbd70bdd0471b2a7857c94f5922b1 /tests/virtio-blk-test.c
parente8c81b4d8a5a2fd125e559cb02b8a87598419041 (diff)
downloadhqemu-70556264a89a268efba1d7e8e341adcdd7881eb4.zip
hqemu-70556264a89a268efba1d7e8e341adcdd7881eb4.tar.gz
libqos: use microseconds instead of iterations for virtio timeout
Some hosts are slow or overloaded so test execution takes a long time. Test cases use timeouts to protect against an infinite loop stalling the test forever (especially important in automated test setups). Commit 6cd14054b67774cc58a51fca6660cfa1d3c08059 ("libqos virtio: Increase ISR timeout") increased the clock_step() value in an attempt to lengthen the virtio interrupt wait timeout, but timeout failures are still occuring on the Travis automated testing platform. This is because clock_step() only affects the guest's virtual time. Virtio requests can be bottlenecked on host disk I/O latency - which cannot be improved by stepping the clock, so the fix was ineffective. This patch changes the qvirtio_wait_queue_isr() and qvirtio_wait_config_isr() timeout mechanism from loop iterations to microseconds. This way the test case can specify an absolute 30 second timeout. Number of loop iterations is not a reliable timeout mechanism since the speed depends on many factors including host performance. Tests should no longer timeout on overloaded Travis instances. Cc: Marc MarĂ­ <marc.mari.barcelo@gmail.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/virtio-blk-test.c')
-rw-r--r--tests/virtio-blk-test.c47
1 files changed, 22 insertions, 25 deletions
diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c
index 0e3bfa7..5ce6e79 100644
--- a/tests/virtio-blk-test.c
+++ b/tests/virtio-blk-test.c
@@ -41,7 +41,6 @@
#define QVIRTIO_BLK_T_GET_ID 8
#define TEST_IMAGE_SIZE (64 * 1024 * 1024)
-#define QVIRTIO_BLK_TIMEOUT 100
#define QVIRTIO_BLK_TIMEOUT_US (30 * 1000 * 1000)
#define PCI_SLOT 0x04
#define PCI_FN 0x00
@@ -184,8 +183,8 @@ static void pci_basic(void)
qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false);
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -206,8 +205,8 @@ static void pci_basic(void)
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -234,8 +233,8 @@ static void pci_basic(void)
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -257,8 +256,8 @@ static void pci_basic(void)
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -330,8 +329,8 @@ static void pci_indirect(void)
free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect);
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -355,8 +354,8 @@ static void pci_indirect(void)
free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect);
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -397,8 +396,7 @@ static void pci_config(void)
qmp("{ 'execute': 'block_resize', 'arguments': { 'device': 'drive0', "
" 'size': %d } }", n_size);
- g_assert(qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, QVIRTIO_BLK_TIMEOUT_US);
capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
g_assert_cmpint(capacity, ==, n_size / 512);
@@ -453,8 +451,7 @@ static void pci_msix(void)
qmp("{ 'execute': 'block_resize', 'arguments': { 'device': 'drive0', "
" 'size': %d } }", n_size);
- g_assert(qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, QVIRTIO_BLK_TIMEOUT_US);
capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
g_assert_cmpint(capacity, ==, n_size / 512);
@@ -474,8 +471,8 @@ static void pci_msix(void)
qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false);
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -498,8 +495,8 @@ static void pci_msix(void)
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -575,8 +572,8 @@ static void pci_idx(void)
qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false);
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
/* Write request */
req.type = QVIRTIO_BLK_T_OUT;
@@ -619,8 +616,8 @@ static void pci_idx(void)
qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head);
- g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
- QVIRTIO_BLK_TIMEOUT));
+ qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq,
+ QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
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