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authorRichard Henderson <rth@twiddle.net>2013-09-04 08:11:05 -0700
committerRichard Henderson <rth@twiddle.net>2013-10-10 13:19:21 -0700
commitf713d6ad7b9f52129695d5e3e63541abcd0375c0 (patch)
tree4b124c9065daa1d8a800f7c4e08d8f85b31b1172 /tcg/tci/tcg-target.h
parent6c5f4ead649dd876c5762c468b205563288d5ecd (diff)
downloadhqemu-f713d6ad7b9f52129695d5e3e63541abcd0375c0.zip
hqemu-f713d6ad7b9f52129695d5e3e63541abcd0375c0.tar.gz
tcg: Add qemu_ld_st_i32/64
Step two in the transition, adding the new ldst opcodes. Keep the old opcodes around until all backends support the new opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/tci/tcg-target.h')
-rw-r--r--tcg/tci/tcg-target.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index c2ecfbe..6e1da8c 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -120,6 +120,8 @@
#define TCG_TARGET_HAS_mulsh_i64 0
#endif /* TCG_TARGET_REG_BITS == 64 */
+#define TCG_TARGET_HAS_new_ldst 0
+
/* Number of registers available.
For 32 bit hosts, we need more than 8 registers (call arguments). */
/* #define TCG_TARGET_NB_REGS 8 */
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