diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-07-27 12:41:45 +0200 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-08-24 11:10:54 -0700 |
| commit | 0632e555fc4d281d69cb08d98d500d96185b041f (patch) | |
| tree | afda468f981062df0f88c1dc63be187731f2ad8f /tcg/sparc | |
| parent | 299f80130401153af1a6ddb3cc011781bcd47600 (diff) | |
| download | hqemu-0632e555fc4d281d69cb08d98d500d96185b041f.zip hqemu-0632e555fc4d281d69cb08d98d500d96185b041f.tar.gz | |
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
The op is sometimes named trunc_shr_i32 and sometimes trunc_shr_i64_i32,
and the name in the README doesn't match the name offered to the
frontends.
Always use the long name to make it clear it is a size changing op.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/sparc')
| -rw-r--r-- | tcg/sparc/tcg-target.c | 4 | ||||
| -rw-r--r-- | tcg/sparc/tcg-target.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 1a870a8..b23032b 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1413,7 +1413,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext32u_i64: tcg_out_arithi(s, a0, a1, 0, SHIFT_SRL); break; - case INDEX_op_trunc_shr_i32: + case INDEX_op_trunc_shr_i64_i32: if (a2 == 0) { tcg_out_mov(s, TCG_TYPE_I32, a0, a1); } else { @@ -1533,7 +1533,7 @@ static const TCGTargetOpDef sparc_op_defs[] = { { INDEX_op_ext32s_i64, { "R", "r" } }, { INDEX_op_ext32u_i64, { "R", "r" } }, - { INDEX_op_trunc_shr_i32, { "r", "R" } }, + { INDEX_op_trunc_shr_i64_i32, { "r", "R" } }, { INDEX_op_brcond_i64, { "RZ", "RJ" } }, { INDEX_op_setcond_i64, { "R", "RZ", "RJ" } }, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index f584de4..336c47f 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -118,7 +118,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 -#define TCG_TARGET_HAS_trunc_shr_i32 1 +#define TCG_TARGET_HAS_trunc_shr_i64_i32 1 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 0 #define TCG_TARGET_HAS_rot_i64 0 |
