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| author | Tom Musta <tommusta@gmail.com> | 2014-01-07 10:05:56 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:40 +0100 |
| commit | 5c77a786e21e9dc12efc0f0590221e67dd5143da (patch) | |
| tree | 4bbb2bc96304ed9ea240656362c982429d09f974 /tcg/arm | |
| parent | 1fa6c533047b4447cef693a1f54babc6a69fe19d (diff) | |
| download | hqemu-5c77a786e21e9dc12efc0f0590221e67dd5143da.zip hqemu-5c77a786e21e9dc12efc0f0590221e67dd5143da.tar.gz | |
target-ppc: Add ISA2.06 lbarx, lharx Instructions
This patch adds the byte and halfword variants of the Load and
Reserve instructions. Since there is much commonality among
all forms of Load and Reserve, a macro is provided and the existing
implementations of lwarx and ldarx are refactoried to use this
macro.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'tcg/arm')
0 files changed, 0 insertions, 0 deletions
