summaryrefslogtreecommitdiffstats
path: root/target-xtensa
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2014-11-03 16:43:32 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-11-03 16:43:32 +0000
commiteb5f222b5c125de1b47970c6096a3107ffe1d69b (patch)
tree1a52e60e8070f9b664f761bce085edde569a5986 /target-xtensa
parent7135781f65f1267a72bf554ee2b7bd605f9e59aa (diff)
parent437a8c11c06f53ed3bcdcc3e5abc5d20b2d439bd (diff)
downloadhqemu-eb5f222b5c125de1b47970c6096a3107ffe1d69b.zip
hqemu-eb5f222b5c125de1b47970c6096a3107ffe1d69b.tar.gz
Merge remote-tracking branch 'remotes/xtensa/tags/20141103-xtensa' into staging
Xtensa fixes and improvements 2014-11-03: - build fixes for cores w/o windowed registers and with profiling interrupts; - fix uImage load address for MMUv2 cores; - add script for automatic core import from xtensa configuration overlay. # gpg: Signature made Sun 02 Nov 2014 22:04:44 GMT using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20141103-xtensa: MAINTAINERS: update xtensa boards target-xtensa: fix build for cores w/o windowed registers target-xtensa: add core importing script hw/xtensa/xtfpga: treat uImage load address as virtual hw/core/loader: implement address translation in uimage loader target-xtensa: avoid duplicate timer interrupt delivery target-xtensa: tests: pre-process tests linker script target-xtensa: add definition for XTHAL_INTTYPE_PROFILING Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-xtensa')
-rw-r--r--target-xtensa/cpu.h1
-rwxr-xr-xtarget-xtensa/import_core.sh53
-rw-r--r--target-xtensa/overlay_tool.h32
3 files changed, 74 insertions, 12 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 9cf5275..beb5486 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -266,6 +266,7 @@ typedef enum {
INTTYPE_TIMER,
INTTYPE_DEBUG,
INTTYPE_WRITE_ERR,
+ INTTYPE_PROFILING,
INTTYPE_MAX
} interrupt_type;
diff --git a/target-xtensa/import_core.sh b/target-xtensa/import_core.sh
new file mode 100755
index 0000000..73791ec
--- /dev/null
+++ b/target-xtensa/import_core.sh
@@ -0,0 +1,53 @@
+#! /bin/bash -e
+
+OVERLAY="$1"
+NAME="$2"
+FREQ=40000
+BASE=$(dirname "$0")
+TARGET="$BASE"/core-$NAME
+
+[ $# -ge 2 -a -f "$OVERLAY" ] || { cat <<EOF
+Usage: $0 overlay-archive-to-import core-name [frequency-in-KHz]
+ overlay-archive-to-import: file name of xtensa-config-overlay.tar.gz
+ to import configuration from.
+ core-name: QEMU name of the imported core. Must be valid
+ C identifier.
+ frequency-in-KHz: core frequency (40MHz if not specified).
+EOF
+exit
+}
+
+[ $# -ge 3 ] && FREQ="$3"
+mkdir -p "$TARGET"
+tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
+ --xform='s/core/core-isa/' config/core.h
+tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
+ sed -n '1,/*\//p;/pc/,/a15/p' > "$TARGET"/gdb-config.c
+NUM_REGS=$(grep XTREG "$TARGET"/gdb-config.c | wc -l)
+
+cat <<EOF > "${TARGET}.c"
+#include "cpu.h"
+#include "exec/exec-all.h"
+#include "exec/gdbstub.h"
+#include "qemu/host-utils.h"
+
+#include "core-$NAME/core-isa.h"
+#include "overlay_tool.h"
+
+static const XtensaConfig $NAME __attribute__((unused)) = {
+ .name = "$NAME",
+ .gdb_regmap = {
+ .num_regs = $NUM_REGS,
+ .reg = {
+#include "core-$NAME/gdb-config.c"
+ }
+ },
+ .clock_freq_khz = $FREQ,
+ DEFAULT_SECTIONS
+};
+
+REGISTER_CORE($NAME)
+EOF
+
+grep -q core-${NAME}.o "$BASE"/Makefile.objs || \
+ echo "obj-y += core-${NAME}.o" >> "$BASE"/Makefile.objs
diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h
index 4c0de7f..6105d4c 100644
--- a/target-xtensa/overlay_tool.h
+++ b/target-xtensa/overlay_tool.h
@@ -108,20 +108,27 @@
#define XCHAL_WINDOW_UF12_VECOFS 0x00000140
#endif
+#if XCHAL_HAVE_WINDOWED
+#define WINDOW_VECTORS \
+ [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR, \
+ [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR, \
+ [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR, \
+ [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR, \
+ [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR, \
+ [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \
+ XCHAL_WINDOW_VECTORS_VADDR,
+#else
+#define WINDOW_VECTORS
+#endif
+
#define EXCEPTION_VECTORS { \
[EXC_RESET] = XCHAL_RESET_VECTOR_VADDR, \
- [EXC_WINDOW_OVERFLOW4] = XCHAL_WINDOW_OF4_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
- [EXC_WINDOW_UNDERFLOW4] = XCHAL_WINDOW_UF4_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
- [EXC_WINDOW_OVERFLOW8] = XCHAL_WINDOW_OF8_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
- [EXC_WINDOW_UNDERFLOW8] = XCHAL_WINDOW_UF8_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
- [EXC_WINDOW_OVERFLOW12] = XCHAL_WINDOW_OF12_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
- [EXC_WINDOW_UNDERFLOW12] = XCHAL_WINDOW_UF12_VECOFS + \
- XCHAL_WINDOW_VECTORS_VADDR, \
+ WINDOW_VECTORS \
[EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \
[EXC_USER] = XCHAL_USER_VECTOR_VADDR, \
[EXC_DOUBLE] = XCHAL_DOUBLEEXC_VECTOR_VADDR, \
@@ -163,6 +170,7 @@
#define XTHAL_INTTYPE_TBD1 INTTYPE_DEBUG
#define XTHAL_INTTYPE_TBD2 INTTYPE_WRITE_ERR
#define XTHAL_INTTYPE_WRITE_ERROR INTTYPE_WRITE_ERR
+#define XTHAL_INTTYPE_PROFILING INTTYPE_PROFILING
#define INTERRUPT(i) { \
OpenPOWER on IntegriCloud