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authorRichard Henderson <rth@twiddle.net>2013-09-18 12:53:09 -0700
committerTimothy Pearson <tpearson@raptorengineering.com>2019-11-29 19:32:25 -0600
commitccd5adddee208df7a4494d771503192c96fd1b71 (patch)
tree64c8239229907e0d592ff4d225c871340b5adc8f /target-xtensa/translate.c
parent6b8b5330fe1d83d26b05388cdbada83270f21fd5 (diff)
downloadhqemu-ccd5adddee208df7a4494d771503192c96fd1b71.zip
hqemu-ccd5adddee208df7a4494d771503192c96fd1b71.tar.gz
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
Thus, use cpu_env as the parameter, not TCG_AREG0 directly. Update all uses in the translators. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-xtensa/translate.c')
-rw-r--r--target-xtensa/translate.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 435ee03..fd03603 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -218,24 +218,24 @@ void xtensa_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, pc), "pc");
for (i = 0; i < 16; i++) {
- cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, regs[i]),
regnames[i]);
}
for (i = 0; i < 16; i++) {
- cpu_FR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_FR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, fregs[i].f32[FP_F32_LOW]),
fregnames[i]);
}
for (i = 0; i < 256; ++i) {
if (sregnames[i].name) {
- cpu_SR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_SR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, sregs[i]),
sregnames[i].name);
}
@@ -243,7 +243,7 @@ void xtensa_translate_init(void)
for (i = 0; i < 256; ++i) {
if (uregnames[i].name) {
- cpu_UR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_UR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, uregs[i]),
uregnames[i].name);
}
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