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authorMax Filippov <jcmvbkbc@gmail.com>2012-05-27 18:34:50 +0400
committerBlue Swirl <blauwirbel@gmail.com>2012-06-09 10:45:03 +0000
commit39e7d37f0f25823c00d1105e8eb9b61182fd349c (patch)
tree0fe4ae2b76e4bbb7be3320e34cff25ebbb34d090 /target-xtensa/core-dc233c
parente323bdeff28f3bd647bf02cc9df57971eff3e258 (diff)
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target-xtensa: update EXCVADDR in case of page table lookup
According to ISA, 4.4.2.6, EXCVADDR may be changed by any TLB miss, even if the miss is handled entirely by processor hardware. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa/core-dc233c')
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