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| author | Blue Swirl <blauwirbel@gmail.com> | 2011-06-18 20:27:05 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-06-26 18:25:09 +0000 |
| commit | 4d2c2b77f3d0c59642dd2ce799a0fb4c2a91aca8 (patch) | |
| tree | 5d4c3ab00b8f2beb54cabf241f4d5e3d0bd82049 /target-unicore32 | |
| parent | af2be2077734e0ebfc8afbe6caf0f89a1474eef2 (diff) | |
| download | hqemu-4d2c2b77f3d0c59642dd2ce799a0fb4c2a91aca8.zip hqemu-4d2c2b77f3d0c59642dd2ce799a0fb4c2a91aca8.tar.gz | |
Sparc32: dummy implementation of MXCC MMU breakpoint registers
Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save
and load all MXCC registers.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-unicore32')
0 files changed, 0 insertions, 0 deletions
