summaryrefslogtreecommitdiffstats
path: root/target-tricore
diff options
context:
space:
mode:
authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2014-12-09 16:04:46 +0000
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2015-05-11 14:15:46 +0200
commit250ef8c76861c756354ed1c67f0a4524e5339369 (patch)
tree7a58eabff7e08d24c01c0d77041424f9c62cf652 /target-tricore
parentec62ad1e27ffd1f7ff2172a916d161cc385e73bd (diff)
downloadhqemu-250ef8c76861c756354ed1c67f0a4524e5339369.zip
hqemu-250ef8c76861c756354ed1c67f0a4524e5339369.tar.gz
target-tricore: Fix LOOP using wrong register for compare
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target-tricore')
-rw-r--r--target-tricore/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 54a48cd..d2cd640 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -3440,7 +3440,7 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1,
break;
case OPCM_32_BRR_LOOP:
if (MASK_OP_BRR_OP2(ctx->opcode) == OPC2_32_BRR_LOOP) {
- gen_loop(ctx, r1, offset * 2);
+ gen_loop(ctx, r2, offset * 2);
} else {
/* OPC2_32_BRR_LOOPU */
gen_goto_tb(ctx, 0, ctx->pc + offset * 2);
OpenPOWER on IntegriCloud