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author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-05-06 20:57:10 +0200 |
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committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2015-05-22 17:02:33 +0200 |
commit | ddd8cebe3106bdfb2681d8d283296199fd6c7417 (patch) | |
tree | 107546dd46d1ee9d2ef85b14afc7b355d93a4e45 /target-tricore/tricore-opcodes.h | |
parent | 62872ebc38d700ea30b0cd861e40703dccdcae2a (diff) | |
download | hqemu-ddd8cebe3106bdfb2681d8d283296199fd6c7417.zip hqemu-ddd8cebe3106bdfb2681d8d283296199fd6c7417.tar.gz |
target-tricore: add SWAPMSK instructions of the v1.6.1 ISA
Those instruction were introduced in the new Aurix platform.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore/tricore-opcodes.h')
-rw-r--r-- | target-tricore/tricore-opcodes.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index 95837aa..7ad6df9 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -766,6 +766,9 @@ enum { OPC2_32_BO_CMPSWAP_W_SHORTOFF = 0x23, OPC2_32_BO_CMPSWAP_W_POSTINC = 0x03, OPC2_32_BO_CMPSWAP_W_PREINC = 0x13, + OPC2_32_BO_SWAPMSK_W_SHORTOFF = 0x22, + OPC2_32_BO_SWAPMSK_W_POSTINC = 0x02, + OPC2_32_BO_SWAPMSK_W_PREINC = 0x12, }; /*OPCM_32_BO_ADDRMODE_LDMST_BITREVERSE_CIRCULAR */ enum { @@ -775,6 +778,8 @@ enum { OPC2_32_BO_SWAP_W_CIRC = 0x10, OPC2_32_BO_CMPSWAP_W_BR = 0x03, OPC2_32_BO_CMPSWAP_W_CIRC = 0x13, + OPC2_32_BO_SWAPMSK_W_BR = 0x02, + OPC2_32_BO_SWAPMSK_W_CIRC = 0x12, }; /* * BRC Format |