cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()

Make inline target_memory_rw_debug() always available and change its
argument to CPUState. Let it check if CPUClass::memory_rw_debug provides
a specialized callback and fall back to cpu_memory_rw_debug() otherwise.

The only overriding implementation is for 32-bit sparc.

This prepares for changing GDBState::g_cpu to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>

3 files changed, 10 insertions, 6 deletions

diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 12494cc..d1d0339 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -782,6 +782,9 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
 
     cc->do_interrupt = sparc_cpu_do_interrupt;
     cc->dump_state = sparc_cpu_dump_state;
+#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
+    cc->memory_rw_debug = sparc_cpu_memory_rw_debug;
+#endif
     cc->set_pc = sparc_cpu_set_pc;
     cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb;
 #ifndef CONFIG_USER_ONLY
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 0f35a22..41194ec 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -526,9 +526,8 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev);
 void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env);
 
 #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
-int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr,
-                           uint8_t *buf, int len, int is_write);
-#define TARGET_CPU_MEMORY_RW_DEBUG
+int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
+                              uint8_t *buf, int len, bool is_write);
 #endif
 
 
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index 45d08e4..ef12a0a 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -353,10 +353,12 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)
  * reads (and only reads) in stack frames as if windows were flushed. We assume
  * that the sparc ABI is followed.
  */
-int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr,
-                           uint8_t *buf, int len, int is_write)
+int sparc_cpu_memory_rw_debug(CPUState *cs, vaddr address,
+                              uint8_t *buf, int len, bool is_write)
 {
-    CPUState *cs = CPU(sparc_env_get_cpu(env));
+    SPARCCPU *cpu = SPARC_CPU(cs);
+    CPUSPARCState *env = &cpu->env;
+    target_ulong addr = address;
     int i;
     int len1;
     int cwp = env->cwp;