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author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-10 10:12:00 +0000 |
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committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-10 10:12:00 +0000 |
commit | 22548760ca36e3c9c716bf725194a846d1073855 (patch) | |
tree | 57643945499692088cb5d186a1fd5579ef4b8bbc /target-sparc | |
parent | 9800ee2677ab1f6d506a03086a2fbfe66fe09f5c (diff) | |
download | hqemu-22548760ca36e3c9c716bf725194a846d1073855.zip hqemu-22548760ca36e3c9c716bf725194a846d1073855.tar.gz |
Fix compiler warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r-- | target-sparc/cpu.h | 14 | ||||
-rw-r--r-- | target-sparc/exec.h | 19 | ||||
-rw-r--r-- | target-sparc/helper.c | 25 | ||||
-rw-r--r-- | target-sparc/helper.h | 9 | ||||
-rw-r--r-- | target-sparc/op_helper.c | 6 | ||||
-rw-r--r-- | target-sparc/translate.c | 3 |
6 files changed, 37 insertions, 39 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 6ad98ed..42e8991 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -376,30 +376,30 @@ void cpu_check_irqs(CPUSPARCState *env); #define MMU_KERNEL_IDX 1 #define MMU_HYPV_IDX 2 -static inline int cpu_mmu_index (CPUState *env) +static inline int cpu_mmu_index(CPUState *env1) { #if defined(CONFIG_USER_ONLY) return MMU_USER_IDX; #elif !defined(TARGET_SPARC64) - return env->psrs; + return env1->psrs; #else - if (!env->psrs) + if (!env1->psrs) return MMU_USER_IDX; - else if ((env->hpstate & HS_PRIV) == 0) + else if ((env1->hpstate & HS_PRIV) == 0) return MMU_KERNEL_IDX; else return MMU_HYPV_IDX; #endif } -static inline int cpu_fpu_enabled(CPUState *env) +static inline int cpu_fpu_enabled(CPUState *env1) { #if defined(CONFIG_USER_ONLY) return 1; #elif !defined(TARGET_SPARC64) - return env->psref; + return env1->psref; #else - return ((env->pstate & PS_PEF) != 0) && ((env->fprs & FPRS_FEF) != 0); + return ((env1->pstate & PS_PEF) != 0) && ((env1->fprs & FPRS_FEF) != 0); #endif } diff --git a/target-sparc/exec.h b/target-sparc/exec.h index 504d602..7d67b2d 100644 --- a/target-sparc/exec.h +++ b/target-sparc/exec.h @@ -45,15 +45,6 @@ register uint32_t T2 asm(AREG3); #include "cpu.h" #include "exec-all.h" -void cpu_lock(void); -void cpu_unlock(void); -void cpu_loop_exit(void); -void set_cwp(int new_cwp); -void do_interrupt(int intno); -void memcpy32(target_ulong *dst, const target_ulong *src); -target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); -void dump_mmu(CPUState *env); - static inline void env_to_regs(void) { #if defined(reg_REGWPTR) @@ -66,14 +57,14 @@ static inline void regs_to_env(void) { } -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, int mmu_idx, int is_softmmu); -static inline int cpu_halted(CPUState *env) { - if (!env->halted) +static inline int cpu_halted(CPUState *env1) { + if (!env1->halted) return 0; - if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) { - env->halted = 0; + if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) { + env1->halted = 0; return 0; } return EXCP_HALTED; diff --git a/target-sparc/helper.c b/target-sparc/helper.c index e378028..759232a 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -28,6 +28,7 @@ #include "cpu.h" #include "exec-all.h" #include "qemu-common.h" +#include "helper.h" //#define DEBUG_MMU //#define DEBUG_FEATURES @@ -35,7 +36,7 @@ typedef struct sparc_def_t sparc_def_t; struct sparc_def_t { - const unsigned char *name; + const char *name; target_ulong iu_version; uint32_t fpu_version; uint32_t mmu_version; @@ -47,7 +48,7 @@ struct sparc_def_t { uint32_t features; }; -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model); +static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model); /* Sparc MMU emulation */ @@ -67,13 +68,13 @@ void cpu_unlock(void) #if defined(CONFIG_USER_ONLY) -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, int mmu_idx, int is_softmmu) { if (rw & 2) - env->exception_index = TT_TFAULT; + env1->exception_index = TT_TFAULT; else - env->exception_index = TT_DFAULT; + env1->exception_index = TT_DFAULT; return 1; } @@ -387,8 +388,7 @@ void dump_mmu(CPUState *env) * UltraSparc IIi I/DMMUs */ static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical, int *prot, - int *access_index, target_ulong address, int rw, - int is_user) + target_ulong address, int rw, int is_user) { target_ulong mask; unsigned int i; @@ -447,8 +447,7 @@ static int get_physical_address_data(CPUState *env, target_phys_addr_t *physical } static int get_physical_address_code(CPUState *env, target_phys_addr_t *physical, int *prot, - int *access_index, target_ulong address, int rw, - int is_user) + target_ulong address, int is_user) { target_ulong mask; unsigned int i; @@ -509,9 +508,11 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, int is_user = mmu_idx == MMU_USER_IDX; if (rw == 2) - return get_physical_address_code(env, physical, prot, access_index, address, rw, is_user); + return get_physical_address_code(env, physical, prot, address, + is_user); else - return get_physical_address_data(env, physical, prot, access_index, address, rw, is_user); + return get_physical_address_data(env, physical, prot, address, rw, + is_user); } /* Perform address translation */ @@ -1134,7 +1135,7 @@ static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features) fprintf(stderr, "CPU feature %s not found\n", flagname); } -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model) +static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model) { unsigned int i; const sparc_def_t *def = NULL; diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 8a6e660..408944b 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -175,3 +175,12 @@ VIS_CMPHELPER(cmpne); #undef F_HELPER_SDQ_0_0 #undef VIS_HELPER #undef VIS_CMPHELPER + +void cpu_lock(void); +void cpu_unlock(void); +void cpu_loop_exit(void); +void set_cwp(int new_cwp); +void do_interrupt(int intno); +void memcpy32(target_ulong *dst, const target_ulong *src); +target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); +void dump_mmu(CPUState *env); diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index c53358e..825145b 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -16,21 +16,21 @@ #define DPRINTF_MMU(fmt, args...) \ do { printf("MMU: " fmt , ##args); } while (0) #else -#define DPRINTF_MMU(fmt, args...) +#define DPRINTF_MMU(fmt, args...) do {} while (0) #endif #ifdef DEBUG_MXCC #define DPRINTF_MXCC(fmt, args...) \ do { printf("MXCC: " fmt , ##args); } while (0) #else -#define DPRINTF_MXCC(fmt, args...) +#define DPRINTF_MXCC(fmt, args...) do {} while (0) #endif #ifdef DEBUG_ASI #define DPRINTF_ASI(fmt, args...) \ do { printf("ASI: " fmt , ##args); } while (0) #else -#define DPRINTF_ASI(fmt, args...) +#define DPRINTF_ASI(fmt, args...) do {} while (0) #endif void raise_exception(int tt) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index b9bc2db..a65a3bf 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -66,9 +66,6 @@ typedef struct DisasContext { uint32_t features; } DisasContext; -extern FILE *logfile; -extern int loglevel; - // This function uses non-native bit order #define GET_FIELD(X, FROM, TO) \ ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) |