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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2015-11-08 17:11:59 +0000
committerTimothy Pearson <tpearson@raptorengineering.com>2019-11-29 19:28:21 -0600
commitacf5cc0fd750822fdf12cf8eb6dc4737a56b3e21 (patch)
tree28bdfb2586f9acb8a2108030d70619c403c87424 /target-sparc/helper.c
parent9698a25e45c7ee3e74116c59cdbbbe02b60d8226 (diff)
downloadhqemu-acf5cc0fd750822fdf12cf8eb6dc4737a56b3e21.zip
hqemu-acf5cc0fd750822fdf12cf8eb6dc4737a56b3e21.tar.gz
target-sparc: implement NPT timer bit
If the NPT bit is set in the timer register, all non-supervisor read accesses to the register should fail with a privilege exception. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-By: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'target-sparc/helper.c')
-rw-r--r--target-sparc/helper.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 4850c7c..6600834 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -51,10 +51,16 @@ void helper_tick_set_count(void *opaque, uint64_t count)
#endif
}
-uint64_t helper_tick_get_count(void *opaque)
+uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx)
{
#if !defined(CONFIG_USER_ONLY)
- return cpu_tick_get_count(opaque);
+ CPUTimer *timer = opaque;
+
+ if (timer->npt && mem_idx < MMU_KERNEL_IDX) {
+ helper_raise_exception(env, TT_PRIV_INSN);
+ }
+
+ return cpu_tick_get_count(timer);
#else
return 0;
#endif
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