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authorThomas Huth <thuth@linux.vnet.ibm.com>2015-02-12 18:09:27 +0100
committerChristian Borntraeger <borntraeger@de.ibm.com>2015-02-18 09:37:14 +0100
commitede59855785f1980be76d9d3b3a727954bfbc461 (patch)
tree1c0fa4425cbd52aa7a92aa13a2715213512bd79c /target-s390x
parent43d49b0115aef2ead5125d4aa9719852d47ef6fc (diff)
downloadhqemu-ede59855785f1980be76d9d3b3a727954bfbc461.zip
hqemu-ede59855785f1980be76d9d3b3a727954bfbc461.tar.gz
s390x/mmu: Renaming related to the ASCE confusion
An Address Space Control Element (ASCE) is only the very first unit of an s390 address translation (normally residing in one of the control registers). The entries in the page tables are called differently. So let's call the relevant variable pt_entry instead of asce in mmu_translate_pte() to avoid future confusion (thus there is no functional change in this patch, just renaming). Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Diffstat (limited to 'target-s390x')
-rw-r--r--target-s390x/mmu_helper.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/target-s390x/mmu_helper.c b/target-s390x/mmu_helper.c
index 702e8b8..7dc9900 100644
--- a/target-s390x/mmu_helper.c
+++ b/target-s390x/mmu_helper.c
@@ -104,22 +104,22 @@ static target_ulong mmu_real2abs(CPUS390XState *env, target_ulong raddr)
/* Decode page table entry (normal 4KB page) */
static int mmu_translate_pte(CPUS390XState *env, target_ulong vaddr,
- uint64_t asc, uint64_t asce,
+ uint64_t asc, uint64_t pt_entry,
target_ulong *raddr, int *flags, int rw, bool exc)
{
- if (asce & _PAGE_INVALID) {
- DPRINTF("%s: PTE=0x%" PRIx64 " invalid\n", __func__, asce);
+ if (pt_entry & _PAGE_INVALID) {
+ DPRINTF("%s: PTE=0x%" PRIx64 " invalid\n", __func__, pt_entry);
trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw, exc);
return -1;
}
- if (asce & _PAGE_RO) {
+ if (pt_entry & _PAGE_RO) {
*flags &= ~PAGE_WRITE;
}
- *raddr = asce & _ASCE_ORIGIN;
+ *raddr = pt_entry & _ASCE_ORIGIN;
- PTE_DPRINTF("%s: PTE=0x%" PRIx64 "\n", __func__, asce);
+ PTE_DPRINTF("%s: PTE=0x%" PRIx64 "\n", __func__, pt_entry);
return 0;
}
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