summaryrefslogtreecommitdiffstats
path: root/target-ppc
diff options
context:
space:
mode:
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-02 08:23:14 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-02 08:23:14 +0000
commitfdce4963ea58ec2405e87b2edf96f8c93275d919 (patch)
tree3efdc3e62795e322c30599010aaba9b4515f032e /target-ppc
parent0045734ab789d0adea94c32efb60ed596e4853aa (diff)
downloadhqemu-fdce4963ea58ec2405e87b2edf96f8c93275d919.zip
hqemu-fdce4963ea58ec2405e87b2edf96f8c93275d919.tar.gz
target-ppc: use the new subfi wrapper
(...and fix rldnm) Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5600 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/translate.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 3be4d70..4f17076 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1747,7 +1747,7 @@ GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
{
uint32_t mb, me;
- TCGv t0, t1, t2, t3;
+ TCGv t0, t1, t2;
mb = MB(ctx->opcode);
me = ME(ctx->opcode);
@@ -1757,9 +1757,7 @@ GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER)
tcg_gen_ext32u_tl(t1, cpu_gpr[rS(ctx->opcode)]);
t2 = tcg_temp_new(TCG_TYPE_TL);
tcg_gen_shl_tl(t2, t1, t0);
- t3 = tcg_const_tl(32);
- tcg_gen_sub_tl(t0, t3, t0);
- tcg_temp_free(t3);
+ tcg_gen_subfi_tl(t0, 32, t0);
tcg_gen_shr_tl(t1, t1, t0);
tcg_temp_free(t0);
tcg_gen_or_tl(t2, t2, t1);
@@ -1872,7 +1870,7 @@ GEN_PPC64_R4(rldic, 0x1E, 0x04);
static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb,
uint32_t me)
{
- TCGv t0, t1, t2;
+ TCGv t0, t1;
mb = MB(ctx->opcode);
me = ME(ctx->opcode);
@@ -1880,9 +1878,7 @@ static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb,
tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3f);
t1 = tcg_temp_new(TCG_TYPE_TL);
tcg_gen_shl_tl(t1, cpu_gpr[rS(ctx->opcode)], t0);
- t2 = tcg_const_tl(32);
- tcg_gen_sub_tl(t0, t2, t0);
- tcg_temp_free(t2);
+ tcg_gen_subfi_tl(t0, 64, t0);
tcg_gen_shr_tl(t0, cpu_gpr[rS(ctx->opcode)], t0);
tcg_gen_or_tl(t1, t1, t0);
tcg_temp_free(t0);
OpenPOWER on IntegriCloud