diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-10 00:09:28 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-10 00:09:28 +0000 |
| commit | 5567025f5352b7177f7040f40c200c6a66aa1cd2 (patch) | |
| tree | 2ea66a4b71ce89f955980529585459dcbbc1a4ff /target-ppc | |
| parent | 0badc1ee0e6ab8622b2f9b4ebc3c5ab96f0b58d0 (diff) | |
| download | hqemu-5567025f5352b7177f7040f40c200c6a66aa1cd2.zip hqemu-5567025f5352b7177f7040f40c200c6a66aa1cd2.tar.gz | |
mtfsf: fix FPSCR_VX and FPSCR_FEX computation
The patch below fixes the computation of FPSCR_VX and FPSCR_FEX when
using the mtfsf instruction. As stated in the PowerPC manual the mtfsf
instruction can't alter those bit, and thus it should always be
computed.
Acked by Jocelyn Mayer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4034 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/op_helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 1ea1695..38467c4 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -888,12 +888,16 @@ void do_store_fpscr (uint32_t mask) /* Update VX and FEX */ if (fpscr_ix != 0) env->fpscr |= 1 << FPSCR_VX; + else + env->fpscr &= ~(1 << FPSCR_VX); if ((fpscr_ex & fpscr_eex) != 0) { env->fpscr |= 1 << FPSCR_FEX; env->exception_index = POWERPC_EXCP_PROGRAM; /* XXX: we should compute it properly */ env->error_code = POWERPC_EXCP_FP; } + else + env->fpscr &= ~(1 << FPSCR_FEX); fpscr_set_rounding_mode(); } #undef WORD0 |
