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| author | Tom Musta <tommusta@gmail.com> | 2014-01-07 10:05:53 -0600 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:39 +0100 |
| commit | 6a4fda3358ca5a21e17d553074f74d512745c4f6 (patch) | |
| tree | 559d41bc2d46d7e1abfcc070cfd17a6c30811e2b /target-ppc/translate.c | |
| parent | e44259b6d4f4de69a868510a198b2696f24118a1 (diff) | |
| download | hqemu-6a4fda3358ca5a21e17d553074f74d512745c4f6.zip hqemu-6a4fda3358ca5a21e17d553074f74d512745c4f6.tar.gz | |
target-ppc: Add ISA 2.06 divweu[o] Instructions
This patch addes the Unsigned Divide Word Extended instructions
which were introduced in Power ISA 2.06B.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 7751b29..e361d49 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -998,6 +998,9 @@ static void gen_##name(DisasContext *ctx) \ } \ } +GEN_DIVE(divweu, divweu, 0); +GEN_DIVE(divweuo, divweu, 1); + #if defined(TARGET_PPC64) static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) @@ -9716,6 +9719,8 @@ GEN_INT_ARITH_DIVW(divwu, 0x0E, 0, 0), GEN_INT_ARITH_DIVW(divwuo, 0x1E, 0, 1), GEN_INT_ARITH_DIVW(divw, 0x0F, 1, 0), GEN_INT_ARITH_DIVW(divwo, 0x1F, 1, 1), +GEN_HANDLER_E(divweu, 0x1F, 0x0B, 0x0C, 0, PPC_NONE, PPC2_DIVE_ISA206), +GEN_HANDLER_E(divweuo, 0x1F, 0x0B, 0x1C, 0, PPC_NONE, PPC2_DIVE_ISA206), #if defined(TARGET_PPC64) #undef GEN_INT_ARITH_DIVD |
