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author | Tom Musta <tommusta@gmail.com> | 2014-02-12 15:22:56 -0600 |
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committer | Alexander Graf <agraf@suse.de> | 2014-03-05 03:06:52 +0100 |
commit | 50f5fc0cf24fbc12434a5ad6e3784341f92e23bd (patch) | |
tree | 333245e483bca6590e7e8eb76dd9dc58a2aff099 /target-ppc/translate.c | |
parent | 5dffff5a4746075a4609366440c2c67983eec106 (diff) | |
download | hqemu-50f5fc0cf24fbc12434a5ad6e3784341f92e23bd.zip hqemu-50f5fc0cf24fbc12434a5ad6e3784341f92e23bd.tar.gz |
target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions
This patch adds a macro to insert an entry into the opcode table for Altivec
Power ISA Version 2.07 instructions. The macro is similar to the GEN_VXFORM macro
except that it tags the entry with the PPC2_ALTIVEC_207 flag rather than
PPC_ALTIVEC.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r-- | target-ppc/translate.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index ffcee7f..a55789f 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -10280,6 +10280,11 @@ GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20), #undef GEN_VXFORM #define GEN_VXFORM(name, opc2, opc3) \ GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) + +#undef GEN_VXFORM_207 +#define GEN_VXFORM_207(name, opc2, opc3) \ +GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207) + #undef GEN_VXFORM_DUAL #define GEN_VXFORM_DUAL(name0, name1, opc2, opc3, type0, type1) \ GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, type0, type1) |