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authorDavid Gibson <david@gibson.dropbear.id.au>2016-01-28 10:31:04 +1100
committerTimothy Pearson <tpearson@raptorengineering.com>2019-11-29 19:30:22 -0600
commit3c79ba6edbf9e51ce0cf17d81d693b75570d807a (patch)
tree8506e311304c39337c6f88b36cc9d7a5dc41807c /target-ppc/translate.c
parent8854889c059f6df324ed3113067155ddbe241aae (diff)
downloadhqemu-3c79ba6edbf9e51ce0cf17d81d693b75570d807a.zip
hqemu-3c79ba6edbf9e51ce0cf17d81d693b75570d807a.tar.gz
target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one()
Currently both the tlbiva instruction (used on 44x chips) and the tlbie instruction (used on hash MMU chips) are both handled via ppc_tlb_invalidate_one(). This is silly, because they're invoked from different places, and do different things. Clean this up by separating out the tlbiva instruction into its own handling. In fact the implementation is only a stub anyway. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index bae7c1a..205cdaf 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5913,7 +5913,7 @@ static void gen_tlbiva(DisasContext *ctx)
}
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
- gen_helper_tlbie(cpu_env, cpu_gpr[rB(ctx->opcode)]);
+ gen_helper_tlbiva(cpu_env, cpu_gpr[rB(ctx->opcode)]);
tcg_temp_free(t0);
#endif
}
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