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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-29 10:08:06 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-29 10:08:06 +0000
commit9133e39b8473ee118c756b7e9356b0e5dbe6e18d (patch)
tree0ad070128a238aa41a39b1867c563c079996afb4 /target-ppc/cpu.h
parent4369415f1e62eff10201f20c984e02490c846046 (diff)
downloadhqemu-9133e39b8473ee118c756b7e9356b0e5dbe6e18d.zip
hqemu-9133e39b8473ee118c756b7e9356b0e5dbe6e18d.tar.gz
Push common interrupt variables to cpu-defs.h (Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 3eea695..a884fd6 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -646,7 +646,6 @@ struct CPUPPCState {
int bfd_mach;
uint32_t flags;
- int exception_index;
int error_code;
int interrupt_request;
uint32_t pending_interrupts;
@@ -672,7 +671,6 @@ struct CPUPPCState {
opc_handler_t *opcodes[0x40];
/* Those resources are used only in Qemu core */
- jmp_buf jmp_env;
int user_mode_only; /* user mode only simulation */
target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */
target_ulong hflags_nmsr; /* specific hflags, not comming from MSR */
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