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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
commit | 3d7b417e13152587df587fe58789740c3ef7abb9 (patch) | |
tree | 824bf571e3bad076986e5144f6834ffd032d77f1 /target-ppc/cpu.h | |
parent | d75a0b97e0e9bfcd73dd2ef081ba06e53932b42d (diff) | |
download | hqemu-3d7b417e13152587df587fe58789740c3ef7abb9.zip hqemu-3d7b417e13152587df587fe58789740c3ef7abb9.tar.gz |
target-ppc: Convert XER accesses to TCG
Define XER bits as a single register and access them individually to
avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit
registers).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r-- | target-ppc/cpu.h | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index b50a593..4422411 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -553,8 +553,7 @@ struct CPUPPCState { /* condition register */ uint32_t crf[8]; /* XER */ - /* XXX: We use only 5 fields, but we want to keep the structure aligned */ - uint8_t xer[8]; + target_ulong xer; /* Reservation address */ target_ulong reserve; @@ -831,16 +830,16 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) /*****************************************************************************/ /* Registers definitions */ -#define XER_SO 31 -#define XER_OV 30 -#define XER_CA 29 -#define XER_CMP 8 -#define XER_BC 0 -#define xer_so env->xer[4] -#define xer_ov env->xer[6] -#define xer_ca env->xer[2] -#define xer_cmp env->xer[1] -#define xer_bc env->xer[0] +#define XER_SO 31 +#define XER_OV 30 +#define XER_CA 29 +#define XER_CMP 8 +#define XER_BC 0 +#define xer_so ((env->xer >> XER_SO) & 1) +#define xer_ov ((env->xer >> XER_OV) & 1) +#define xer_ca ((env->xer >> XER_CA) & 1) +#define xer_cmp ((env->xer >> XER_CMP) & 0xFF) +#define xer_bc ((env->xer >> XER_BC) & 0x7F) /* SPR definitions */ #define SPR_MQ (0x000) |