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| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-19 13:22:47 +0000 |
|---|---|---|
| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-19 13:22:47 +0000 |
| commit | 082c6681b6c4af0035d9dad34a4a784be8c21dbe (patch) | |
| tree | 32efad9f8a719d72814f95afc0e102b1fc02ce88 /target-ppc/cpu.h | |
| parent | add78955b0451c6d14d325d66592a634b2e5d595 (diff) | |
| download | hqemu-082c6681b6c4af0035d9dad34a4a784be8c21dbe.zip hqemu-082c6681b6c4af0035d9dad34a4a784be8c21dbe.tar.gz | |
Remove shared macro used to define PowerPC implementations instructions sets:
tend more to propagate bugged definition than simplify the code.
Check and fix PowerPC 6xx implementations definitions.
Misc fixes in PowerPC CPU list.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3707 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 6f3ff86..7cbc8da 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1040,9 +1040,11 @@ static inline int cpu_mmu_index (CPUState *env) #define SPR_RCPU_MI_RBA2 (0x302) #define SPR_MPC_MI_AP (0x302) #define SPR_PERF3 (0x303) +#define SPR_620_PMC1R (0x303) #define SPR_RCPU_MI_RBA3 (0x303) #define SPR_MPC_MI_EPN (0x303) #define SPR_PERF4 (0x304) +#define SPR_620_PMC2R (0x304) #define SPR_PERF5 (0x305) #define SPR_MPC_MI_TWC (0x305) #define SPR_PERF6 (0x306) @@ -1058,6 +1060,7 @@ static inline int cpu_mmu_index (CPUState *env) #define SPR_RCPU_L2U_RBA2 (0x30A) #define SPR_MPC_MD_AP (0x30A) #define SPR_PERFB (0x30B) +#define SPR_620_MMCR0R (0x30B) #define SPR_RCPU_L2U_RBA3 (0x30B) #define SPR_MPC_MD_EPN (0x30B) #define SPR_PERFC (0x30C) @@ -1072,7 +1075,9 @@ static inline int cpu_mmu_index (CPUState *env) #define SPR_UPERF1 (0x311) #define SPR_UPERF2 (0x312) #define SPR_UPERF3 (0x313) +#define SPR_620_PMC1W (0x313) #define SPR_UPERF4 (0x314) +#define SPR_620_PMC2W (0x314) #define SPR_UPERF5 (0x315) #define SPR_UPERF6 (0x316) #define SPR_UPERF7 (0x317) @@ -1080,6 +1085,7 @@ static inline int cpu_mmu_index (CPUState *env) #define SPR_UPERF9 (0x319) #define SPR_UPERFA (0x31A) #define SPR_UPERFB (0x31B) +#define SPR_620_MMCR0W (0x31B) #define SPR_UPERFC (0x31C) #define SPR_UPERFD (0x31D) #define SPR_UPERFE (0x31E) @@ -1245,13 +1251,14 @@ static inline int cpu_mmu_index (CPUState *env) #define SPR_LDSTCR (0x3F8) #define SPR_L2PMCR (0x3F8) #define SPR_750_HID2 (0x3F8) -#define SPR_620_HID8 (0x3F8) +#define SPR_620_BUSCSR (0x3F8) #define SPR_Exxx_L1FINV0 (0x3F8) #define SPR_L2CR (0x3F9) -#define SPR_620_HID9 (0x3F9) +#define SPR_620_L2CR (0x3F9) #define SPR_L3CR (0x3FA) #define SPR_IABR2 (0x3FA) #define SPR_40x_DCCR (0x3FA) +#define SPR_620_L2SR (0x3FA) #define SPR_ICTC (0x3FB) #define SPR_40x_ICCR (0x3FB) #define SPR_THRM1 (0x3FC) |
