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| author | Alexander Graf <agraf@suse.de> | 2012-06-20 21:20:29 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-06-24 01:04:51 +0200 |
| commit | e42a61f185f859246c14445b6e98e195eb3b977b (patch) | |
| tree | 1e3ee47605c54b3986af5816dead928211b6f209 /target-ppc/cpu.h | |
| parent | 84755ed51e6266b115322834933ce404a2fbf3f9 (diff) | |
| download | hqemu-e42a61f185f859246c14445b6e98e195eb3b977b.zip hqemu-e42a61f185f859246c14445b6e98e195eb3b977b.tar.gz | |
PPC: Add support for MSR_CM
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 12200ab..7a77fff 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2212,6 +2212,15 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn) #endif +static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr) +{ + if (env->mmu_model == POWERPC_MMU_BOOKE206) { + return msr & (1ULL << MSR_CM); + } + + return msr & (1ULL << MSR_SF); +} + extern void (*cpu_ppc_hypercall)(CPUPPCState *); static inline bool cpu_has_work(CPUPPCState *env) |
