summaryrefslogtreecommitdiffstats
path: root/target-mips
diff options
context:
space:
mode:
authorAndreas Färber <afaerber@suse.de>2013-06-24 23:50:24 +0200
committerAndreas Färber <afaerber@suse.de>2013-09-03 12:25:55 +0200
commitbdc44640cb33c90809376a262df871a1144d339a (patch)
treeef3b8d1d6a389d85baeb0cee895471b634a2fc3b /target-mips
parent27013bf20d5d93ac75d398aa3608604e8ad91b5a (diff)
downloadhqemu-bdc44640cb33c90809376a262df871a1144d339a.zip
hqemu-bdc44640cb33c90809376a262df871a1144d339a.tar.gz
cpu: Use QTAILQ for CPU list
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/op_helper.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index b828375..8e3a6d7 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1699,15 +1699,14 @@ target_ulong helper_dvpe(CPUMIPSState *env)
CPUState *other_cs = first_cpu;
target_ulong prev = env->mvp->CP0_MVPControl;
- do {
+ CPU_FOREACH(other_cs) {
MIPSCPU *other_cpu = MIPS_CPU(other_cs);
/* Turn off all VPEs except the one executing the dvpe. */
if (&other_cpu->env != env) {
other_cpu->env.mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP);
mips_vpe_sleep(other_cpu);
}
- other_cs = other_cs->next_cpu;
- } while (other_cs);
+ }
return prev;
}
@@ -1716,7 +1715,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
CPUState *other_cs = first_cpu;
target_ulong prev = env->mvp->CP0_MVPControl;
- do {
+ CPU_FOREACH(other_cs) {
MIPSCPU *other_cpu = MIPS_CPU(other_cs);
if (&other_cpu->env != env
@@ -1726,8 +1725,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
other_cpu->env.mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP);
mips_vpe_wake(other_cpu); /* And wake it up. */
}
- other_cs = other_cs->next_cpu;
- } while (other_cs);
+ }
return prev;
}
#endif /* !CONFIG_USER_ONLY */
OpenPOWER on IntegriCloud