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authorAurelien Jarno <aurelien@aurel32.net>2012-10-09 21:53:21 +0200
committerAurelien Jarno <aurelien@aurel32.net>2012-10-31 22:20:48 +0100
commit2d2826b99ee810057c76b48377d286beb9ee943b (patch)
tree5069823a337b4a453fe974ed4135b4d1c4521181 /target-mips/translate.c
parentfc40787abcf8452b8f50d92b7a13243a12972c7a (diff)
downloadhqemu-2d2826b99ee810057c76b48377d286beb9ee943b.zip
hqemu-2d2826b99ee810057c76b48377d286beb9ee943b.tar.gz
target-mips: don't use local temps for store conditional
Store conditional operations only need local temps in user mode. Fix the code to use temp local only in user mode, this spares two memory stores in system mode. At the same time remove a wrong a wrong copied & pasted comment, store operations don't have a register destination. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 05d88c4..2484b23 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1814,13 +1814,14 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
const char *opn = "st_cond";
TCGv t0, t1;
+#ifdef CONFIG_USER_ONLY
t0 = tcg_temp_local_new();
-
- gen_base_offset_addr(ctx, t0, base, offset);
- /* Don't do NOP if destination is zero: we must perform the actual
- memory access. */
-
t1 = tcg_temp_local_new();
+#else
+ t0 = tcg_temp_new();
+ t1 = tcg_temp_new();
+#endif
+ gen_base_offset_addr(ctx, t0, base, offset);
gen_load_gpr(t1, rt);
switch (opc) {
#if defined(TARGET_MIPS64)
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