target-mips: Add missing calls to synchronise SoftFloat status

Add missing calls to synchronise the SoftFloat status with the CP1.FSCR:

+ for the rounding and flush-to-zero modes upon processor reset,

+ for the flush-to-zero mode on FSCR updates through the GDB stub.

Refactor code accordingly and remove the redundant RESTORE_ROUNDING_MODE
macro.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 9d90da0..571b7d7 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19617,6 +19617,8 @@ void cpu_state_reset(CPUMIPSState *env)
     }
 
     compute_hflags(env);
+    restore_rounding_mode(env);
+    restore_flush_mode(env);
     cs->exception_index = EXCP_NONE;
 }