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authorRichard Henderson <rth@twiddle.net>2015-02-13 12:51:55 -0800
committerRichard Henderson <rth@twiddle.net>2015-03-13 12:28:18 -0700
commit42a268c241183877192c376d03bd9b6d527407c7 (patch)
treee41a70d15c0a61d4618b08b889ab9dd56df9c35c /target-m68k
parent3f626793a2182061e3aa50a9e2ed7a322582a60f (diff)
downloadhqemu-42a268c241183877192c376d03bd9b6d527407c7.zip
hqemu-42a268c241183877192c376d03bd9b6d527407c7.tar.gz
tcg: Change translator-side labels to a pointer
This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-m68k')
-rw-r--r--target-m68k/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index a39b495..4959b97 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -679,7 +679,7 @@ static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn,
}
/* This generates a conditional branch, clobbering all temporaries. */
-static void gen_jmpcc(DisasContext *s, int cond, int l1)
+static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
{
TCGv tmp;
@@ -784,7 +784,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
DISAS_INSN(scc)
{
- int l1;
+ TCGLabel *l1;
int cond;
TCGv reg;
@@ -1658,7 +1658,7 @@ DISAS_INSN(branch)
int32_t offset;
uint32_t base;
int op;
- int l1;
+ TCGLabel *l1;
base = s->pc;
op = (insn >> 8) & 0xf;
@@ -2395,7 +2395,7 @@ DISAS_INSN(fbcc)
uint32_t offset;
uint32_t addr;
TCGv flag;
- int l1;
+ TCGLabel *l1;
addr = s->pc;
offset = cpu_ldsw_code(env, s->pc);
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