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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-01-18 22:25:49 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-01-18 22:25:49 +0000 |
| commit | 825bd5f8e5dfe4f521e1dcbce91e7d37b263d65d (patch) | |
| tree | c5cc09cedd5939da9bc0a96b65a1e717e2158ac8 /target-i386 | |
| parent | bc0b1dc1eb30b729dc9cd5ee218370162033afaa (diff) | |
| download | hqemu-825bd5f8e5dfe4f521e1dcbce91e7d37b263d65d.zip hqemu-825bd5f8e5dfe4f521e1dcbce91e7d37b263d65d.tar.gz | |
temporary gcc 3.3 fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@562 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/op.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/target-i386/op.c b/target-i386/op.c index 34fc4c7..46e75e1 100644 --- a/target-i386/op.c +++ b/target-i386/op.c @@ -19,8 +19,12 @@ */ /* XXX: must use this define because the soft mmu macros have huge - register constraints so they cannot be used in any C code */ + register constraints so they cannot be used in any C code. gcc 3.3 + does not seem to be able to handle some constraints in rol + operations, so we disable it. */ +#if !(__GNUC__ == 3 && __GNUC_MINOR__ == 3) #define ASM_SOFTMMU +#endif #include "exec.h" /* n must be a constant to be efficient */ |
