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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-17 13:57:33 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-17 13:57:33 +0000
commit07d2c595580fecadb0e4113ae1be3e6421b91956 (patch)
treefd9b82f5651abdf2858e7bbf483a6bae3ae12a55 /target-i386/helper.c
parentcad3a37d3ef861a3a84b57b630b5ad1ed204ad5f (diff)
downloadhqemu-07d2c595580fecadb0e4113ae1be3e6421b91956.zip
hqemu-07d2c595580fecadb0e4113ae1be3e6421b91956.tar.gz
moved eflags computation outside op.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4472 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/helper.c')
-rw-r--r--target-i386/helper.c79
1 files changed, 79 insertions, 0 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 126fde8..ce99c95 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -5239,3 +5239,82 @@ void helper_movq(uint64_t *d, uint64_t *s)
#undef SHIFT
#endif
+
+static int compute_all_eflags(void)
+{
+ return CC_SRC;
+}
+
+static int compute_c_eflags(void)
+{
+ return CC_SRC & CC_C;
+}
+
+CCTable cc_table[CC_OP_NB] = {
+ [CC_OP_DYNAMIC] = { /* should never happen */ },
+
+ [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
+
+ [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
+ [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
+ [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
+
+ [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
+ [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
+ [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
+
+ [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
+ [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
+ [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
+
+ [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
+ [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
+ [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
+
+ [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
+ [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
+ [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
+
+ [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
+ [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
+ [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
+
+ [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
+ [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
+ [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
+
+ [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
+ [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
+ [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
+
+ [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
+ [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
+ [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
+
+ [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
+ [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
+ [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
+
+#ifdef TARGET_X86_64
+ [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
+
+ [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
+
+ [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
+
+ [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
+
+ [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
+
+ [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
+
+ [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
+
+ [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
+
+ [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
+
+ [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
+#endif
+};
+
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