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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-09-27 19:54:02 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-09-27 19:54:02 +0000
commit8988ae8945f93049a0e416600d928a7b4ce8446f (patch)
tree7dd6859921dc3a407dc1f678f48ec6e2064df0de /target-i386/cpu.h
parent69c3bcb48f3dd61251bca66cba375b4147e4cfca (diff)
downloadhqemu-8988ae8945f93049a0e416600d928a7b4ce8446f.zip
hqemu-8988ae8945f93049a0e416600d928a7b4ce8446f.tar.gz
SMM fix for x86_64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2183 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 55e7a98..3050740 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -260,6 +260,7 @@
#define CPUID_MCA (1 << 14)
#define CPUID_CMOV (1 << 15)
#define CPUID_PAT (1 << 16)
+#define CPUID_PSE36 (1 << 17)
#define CPUID_CLFLUSH (1 << 19)
/* ... */
#define CPUID_MMX (1 << 23)
@@ -543,7 +544,8 @@ void cpu_set_ferr(CPUX86State *s);
cache: it synchronizes the hflags with the segment cache values */
static inline void cpu_x86_load_seg_cache(CPUX86State *env,
int seg_reg, unsigned int selector,
- uint32_t base, unsigned int limit,
+ target_ulong base,
+ unsigned int limit,
unsigned int flags)
{
SegmentCache *sc;
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