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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-17 12:44:31 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-17 12:44:31 +0000 |
commit | b6abf97df19a3c632ca6977c2056f8a675f3f3f0 (patch) | |
tree | 04cd3e42bb8e0f2b567e720ed2865a5eb950b1b9 /target-i386/cpu.h | |
parent | c6e113f5680538a551f79df3ab19b69aed628521 (diff) | |
download | hqemu-b6abf97df19a3c632ca6977c2056f8a675f3f3f0.zip hqemu-b6abf97df19a3c632ca6977c2056f8a675f3f3f0.tar.gz |
converted condition code supprot to TCG - converted shift ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r-- | target-i386/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 5c3e7cb..eb784b4 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -476,6 +476,7 @@ typedef struct CPUX86State { /* temporaries if we cannot store them in host registers */ target_ulong t0, t1, t2; #endif + target_ulong t3; /* standard registers */ target_ulong regs[CPU_NB_REGS]; @@ -727,6 +728,13 @@ static inline int cpu_mmu_index (CPUState *env) return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0; } +typedef struct CCTable { + int (*compute_all)(void); /* return all the flags */ + int (*compute_c)(void); /* return the C flag */ +} CCTable; + +extern CCTable cc_table[]; + #include "cpu-all.h" #include "svm.h" |