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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-25 17:26:41 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-25 17:26:41 +0000 |
commit | 1e4840bf40f1bcb08ed539cb644522707902a421 (patch) | |
tree | bc7da738930769a3504236ba5a6dd6bff3a3134c /target-i386/cpu.h | |
parent | 641d5fbe6bef1cbc34732665efa8d5f0b71acbc4 (diff) | |
download | hqemu-1e4840bf40f1bcb08ed539cb644522707902a421.zip hqemu-1e4840bf40f1bcb08ed539cb644522707902a421.tar.gz |
transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4577 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r-- | target-i386/cpu.h | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index eb784b4..f23a782 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -472,12 +472,6 @@ typedef union { #define NB_MMU_MODES 2 typedef struct CPUX86State { -#if TARGET_LONG_BITS > HOST_LONG_BITS - /* temporaries if we cannot store them in host registers */ - target_ulong t0, t1, t2; -#endif - target_ulong t3; - /* standard registers */ target_ulong regs[CPU_NB_REGS]; target_ulong eip; @@ -526,6 +520,7 @@ typedef struct CPUX86State { XMMReg xmm_regs[CPU_NB_REGS]; XMMReg xmm_t0; MMXReg mmx_t0; + target_ulong cc_tmp; /* temporary for rcr/rcl */ /* sysenter registers */ uint32_t sysenter_cs; |