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author | Stefan Weil <sw@weilnetz.de> | 2014-06-13 20:42:57 +0200 |
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committer | Michael Tokarev <mjt@tls.msk.ru> | 2014-06-24 20:01:24 +0400 |
commit | 5d831be27289c244969cbe6a3b87cbc0b44b1532 (patch) | |
tree | 7760a1ec0069867e5c775836f706296987eb4d6f /target-arm | |
parent | 10358b6a1cc466a7d6e6d78364c972935634bdb7 (diff) | |
download | hqemu-5d831be27289c244969cbe6a3b87cbc0b44b1532.zip hqemu-5d831be27289c244969cbe6a3b87cbc0b44b1532.tar.gz |
Fix new typos (found by codespell)
* accomodate -> accommodate
* aquiring -> acquiring
* beacuse -> because
* loosing -> losing
* prefering -> preferring
* threshhold -> threshold
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index ed4d2bb..d343856 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2350,7 +2350,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) { .name = "ID_AA64DFR0_EL1", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 5, .opc2 = 0, .access = PL1_R, .type = ARM_CP_CONST, - /* We mask out the PMUVer field, beacuse we don't currently + /* We mask out the PMUVer field, because we don't currently * implement the PMU. Not advertising it prevents the guest * from trying to use it and getting UNDEFs on registers we * don't implement. |