summaryrefslogtreecommitdiffstats
path: root/target-arm
diff options
context:
space:
mode:
authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-27 17:09:53 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-27 17:09:53 +0100
commit3b685ba7bfbecd3e765aff66e67b820653619b7d (patch)
tree89d6bf413e60ac077633badaf399d058f97eb5ba /target-arm
parent1fe8141ed4a8b0f2b198da7f4b1046a224ab2eb9 (diff)
downloadhqemu-3b685ba7bfbecd3e765aff66e67b820653619b7d.zip
hqemu-3b685ba7bfbecd3e765aff66e67b820653619b7d.tar.gz
target-arm: Register EL2 versions of ELR and SPSR
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-16-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/helper.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 368413c..a49cf94 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2101,6 +2101,19 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
REGINFO_SENTINEL
};
+static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
+ { .name = "ELR_EL2", .state = ARM_CP_STATE_AA64,
+ .type = ARM_CP_NO_MIGRATE,
+ .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 1,
+ .access = PL2_RW,
+ .fieldoffset = offsetof(CPUARMState, elr_el[2]) },
+ { .name = "SPSR_EL2", .state = ARM_CP_STATE_AA64,
+ .type = ARM_CP_NO_MIGRATE,
+ .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0,
+ .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, banked_spsr[6]) },
+ REGINFO_SENTINEL
+};
+
static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
@@ -2352,6 +2365,9 @@ void register_cp_regs_for_features(ARMCPU *cpu)
define_arm_cp_regs(cpu, v8_cp_reginfo);
define_aarch64_debug_regs(cpu);
}
+ if (arm_feature(env, ARM_FEATURE_EL2)) {
+ define_arm_cp_regs(cpu, v8_el2_cp_reginfo);
+ }
if (arm_feature(env, ARM_FEATURE_MPU)) {
/* These are the MPU registers prior to PMSAv6. Any new
* PMSA core later than the ARM946 will require that we
OpenPOWER on IntegriCloud