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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-05-27 17:09:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-05-27 17:09:50 +0100 |
| commit | c1197795436f51652bbb253c9422265676264050 (patch) | |
| tree | 656699f8f37bf3860f9d2d2aec05c3d37cd83cdc /target-arm/translate.c | |
| parent | a99caa48d89c2d36362b45d513c4952233acb775 (diff) | |
| download | hqemu-c1197795436f51652bbb253c9422265676264050.zip hqemu-c1197795436f51652bbb253c9422265676264050.tar.gz | |
target-arm/translate.c: Use get_mem_index() for SRS memory accesses
The SRS instruction was using a hardcoded 0 for the memory
accesses. This happens to be OK since the SRS instruction is
UNPREDICTABLE in User and System modes, but is awkward if we
want to rearrange the MMU index uses. Switch to using
get_mem_index() like all the other accesses.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1400980132-25949-4-git-send-email-edgar.iglesias@gmail.com
Diffstat (limited to 'target-arm/translate.c')
| -rw-r--r-- | target-arm/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index e708f4a..e40b0a7 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7338,11 +7338,11 @@ static void gen_srs(DisasContext *s, } tcg_gen_addi_i32(addr, addr, offset); tmp = load_reg(s, 14); - gen_aa32_st32(tmp, addr, 0); + gen_aa32_st32(tmp, addr, get_mem_index(s)); tcg_temp_free_i32(tmp); tmp = load_cpu_field(spsr); tcg_gen_addi_i32(addr, addr, 4); - gen_aa32_st32(tmp, addr, 0); + gen_aa32_st32(tmp, addr, get_mem_index(s)); tcg_temp_free_i32(tmp); if (writeback) { switch (amode) { |
