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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-17 18:15:04 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-17 18:15:04 +0000 |
commit | 4aa9aca4c25605bcc97a167f8f808a1ec5d34259 (patch) | |
tree | 34fef8ae3c3916a174ae82c81453ba14229887e3 /target-arm/translate.c | |
parent | 116842ee3e64c706da7e1e0cca478936c4293592 (diff) | |
download | hqemu-4aa9aca4c25605bcc97a167f8f808a1ec5d34259.zip hqemu-4aa9aca4c25605bcc97a167f8f808a1ec5d34259.tar.gz |
Remove arm's local not_i32 tcg op now that there's one in tcg.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r-- | target-arm/translate.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index ef46342..f149713 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -451,12 +451,6 @@ static void gen_sub_carry(TCGv dest, TCGv t0, TCGv t1) #define gen_sbc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[0], cpu_T[1]) #define gen_rsc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[1], cpu_T[0]) -/* FIXME: Implement this natively. */ -static inline void tcg_gen_not_i32(TCGv t0, TCGv t1) -{ - tcg_gen_xori_i32(t0, t1, ~0); -} - /* T0 &= ~T1. Clobbers T1. */ /* FIXME: Implement bic natively. */ static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1) |