ARM TCG conversion 10/16.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 0 insertions, 25 deletions

diff --git a/target-arm/exec.h b/target-arm/exec.h
index 9b284f2..d953098 100644
--- a/target-arm/exec.h
+++ b/target-arm/exec.h
@@ -25,13 +25,6 @@ register uint32_t T0 asm(AREG1);
 register uint32_t T1 asm(AREG2);
 register uint32_t T2 asm(AREG3);
 
-/* TODO: Put these in FP regs on targets that have such things.  */
-/* It is ok for FT0s and FT0d to overlap.  Likewise FT1s and FT1d.  */
-#define FT0s env->vfp.tmp0s
-#define FT1s env->vfp.tmp1s
-#define FT0d env->vfp.tmp0d
-#define FT1d env->vfp.tmp1d
-
 #define M0   env->iwmmxt.val
 
 #include "cpu.h"
@@ -83,23 +76,5 @@ void cpu_loop_exit(void);
 
 void raise_exception(int);
 
-void do_vfp_abss(void);
-void do_vfp_absd(void);
-void do_vfp_negs(void);
-void do_vfp_negd(void);
-void do_vfp_sqrts(void);
-void do_vfp_sqrtd(void);
-void do_vfp_cmps(void);
-void do_vfp_cmpd(void);
-void do_vfp_cmpes(void);
-void do_vfp_cmped(void);
-void do_vfp_set_fpscr(void);
-void do_vfp_get_fpscr(void);
-float32 helper_recps_f32(float32, float32);
-float32 helper_rsqrts_f32(float32, float32);
-uint32_t helper_recpe_u32(uint32_t);
-uint32_t helper_rsqrte_u32(uint32_t);
-float32 helper_recpe_f32(float32);
-float32 helper_rsqrte_f32(float32);
 void helper_neon_tbl(int rn, int maxindex);
 uint32_t helper_neon_mul_p8(uint32_t op1, uint32_t op2);