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| author | Greg Bellows <greg.bellows@linaro.org> | 2014-12-11 12:07:52 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-12-11 12:07:52 +0000 |
| commit | be693c87e440e671ed913784554384349ce8331d (patch) | |
| tree | daa5882fa399d0b4cc74241f2cd30bf537bfd397 /target-arm/cpu.h | |
| parent | 54bf36ed351c526cde0c853079f9ff1ab7e2ff89 (diff) | |
| download | hqemu-be693c87e440e671ed913784554384349ce8331d.zip hqemu-be693c87e440e671ed913784554384349ce8331d.tar.gz | |
target-arm: make MAIR0/1 banked
Added CP register info entries for the ARMv7 MAIR0/1 secure banks.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1416242878-876-26-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index a1fefe4..7ba55f0 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -296,7 +296,26 @@ typedef struct CPUARMState { uint32_t c9_pmxevtyper; /* perf monitor event type */ uint32_t c9_pmuserenr; /* perf monitor user enable */ uint32_t c9_pminten; /* perf monitor interrupt enables */ - uint64_t mair_el1; + union { /* Memory attribute redirection */ + struct { +#ifdef HOST_WORDS_BIGENDIAN + uint64_t _unused_mair_0; + uint32_t mair1_ns; + uint32_t mair0_ns; + uint64_t _unused_mair_1; + uint32_t mair1_s; + uint32_t mair0_s; +#else + uint64_t _unused_mair_0; + uint32_t mair0_ns; + uint32_t mair1_ns; + uint64_t _unused_mair_1; + uint32_t mair0_s; + uint32_t mair1_s; +#endif + }; + uint64_t mair_el[4]; + }; union { /* vector base address register */ struct { uint64_t _unused_vbar; |
