target-arm: Add AArch64 ELR_EL1 register.

Add the AArch64 ELR_EL1 register.

Note that this does not live in env->cp15: for KVM migration
compatibility we need to migrate it separately rather than
as part of the system registers, because the KVM-to-userspace
interface puts it in the struct kvm_regs rather than making
them visible via the ONE_REG ioctls.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 4ca75cd..ecdd7a7 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -162,6 +162,8 @@ typedef struct CPUARMState {
     uint32_t condexec_bits; /* IT bits.  cpsr[15:10,26:25].  */
     uint64_t daif; /* exception masks, in the bits they are in in PSTATE */
 
+    uint64_t elr_el1; /* AArch64 ELR_EL1 */
+
     /* System control coprocessor (cp15) */
     struct {
         uint32_t c0_cpuid;