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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2013-12-17 19:42:25 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 19:42:25 +0000 |
| commit | 9d935509fdb48e47cc46e81d2b9d466b18b546ba (patch) | |
| tree | 90d42d5f564146e21609e72ca8b9445356519fbe /target-arm/cpu.c | |
| parent | f46e720a82ccdf1a521cf459448f3f96ed895d43 (diff) | |
| download | hqemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.zip hqemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.tar.gz | |
target-arm: add support for v8 AES instructions
This adds support for the AESE/AESD/AESMC/AESIMC instructions that
are available on some v8 implementations of Aarch32.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 1386266078-6976-1-git-send-email-ard.biesheuvel@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.c')
| -rw-r--r-- | target-arm/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 0635e78..a03743f 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -249,6 +249,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) set_feature(env, ARM_FEATURE_V7); set_feature(env, ARM_FEATURE_ARM_DIV); set_feature(env, ARM_FEATURE_LPAE); + set_feature(env, ARM_FEATURE_V8_AES); } if (arm_feature(env, ARM_FEATURE_V7)) { set_feature(env, ARM_FEATURE_VAPA); |
